3.3 V 16M
×
64/72-Bit SDRAM Modules
3.3 V 32M
×
64/72-Bit SDRAM Modules
3.3 V 64M
×
64/72-Bit SDRAM Modules
PC100-168 pin unbuffered DIMM Modules
Preliminary Information
HYS 64/72V16200GU
HYS 64/72V32220GU
HYS 64/72V32200GU
HYS 64/72V64220GU
• 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications
• One bank 16M
×
64, 16M
×
72, 32M
×
64 and 32M
×
72 organization
• Two bank 32M
×
64, 32M
×
72, 64M
×
64 and 64M
×
72 organization
• Optimized for byte-write non-parity or ECC applications
• Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification
• JEDEC standard Synchronous DRAMs (SDRAM)
• SDRAM Performance:
-8
-8B
100
6
Units
MHz
ns
f
CK
t
AC
Clock frequency (max.)
Clock access time
100
6
• Programmed Latencies:
Product Speed
-8
-8B
PC100
PC100
CL
2
3
t
RCD
2
2
t
RP
2
3
• Single + 3.3 V (± 0.3 V) power supply
• Programmable CAS Latency, Burst Length and Wrap Sequence
(Sequential & Interleave)
• Auto Refresh (CBR) and Self Refresh
• Decoupling capacitors mounted on substrate
• All inputs, outputs are LVTTL compatible
• Serial Presence Detect with E
2
PROM
• Utilizes 32M
×
8 SDRAMs in TSOPII-54 packages
• Uses SIEMENS 128Mbit and 256Mbit SDRAM components
• Gold contact pad
• Card Size: 133.35 mm
×
31.75 mm
×
4.00 mm
Semiconductor Group
1
1998-08-01
HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
The HYS 64/72V1600, HYS 64/72V32220, HYS 64/72V32200 and HYS 64/72V64220 are industry
standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organized as 16M
×
64,
16M
×
72, 32M
×
64 and 32M
×
72 in 1 bank and 32M
×
64, 32M
×
72, 64M
×
64 and 64M
×
72 in
two banks high speed memory arrays designed with 128M and 256M Synchronous DRAMs
(SDRAMs) for non-parity and ECC applications. The DIMMs use -8 and -8B speed sort for 16M
×
8
and 32M
×
8 SDRAM devices in TSOP-54 packages to meet the PC100 requirement. Decoupling
capacitors are mounted on the PC board. The PC board design is according to INTEL’s PC 100
module specification.
The DIMMs have a serial presence detect, implemented with a serial E
2
PROM using the two pin I
2
C
protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are
available to the end user.
All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133.35 mm
long footprint, with 1.25“ (31.75 mm) height.
Ordering Information
Type
HYS 64V16200GU-8
HYS 72V16200GU-8
HYS 64V32220GU-8
HYS 72V32220GU-8
HYS 64V16200GU-8B
HYS 72V16200GU-8B
HYS 64V32220GU-8B
HYS 72V32220GU-8B
HYS 64V32200GU-8
HYS 72V32200GU-8
HYS 64V64220GU-8
HYS 72V64220GU-8
Ordering Code
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-323-620
PC100-323-620
PC100-323-620
PC100-323-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
Package
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
Descriptions
PC100 16M
×
64 1 bank
SDRAM module
PC100 16M
×
72 1 bank
SDRAM module
PC100 32M
×
64 2 bank
SDRAM module
PC100 32M
×
72 2 bank
SDRAM module
PC100 16M
×
64 1 bank
SDRAM module
PC100 16M
×
72 1 bank
SDRAM module
PC100 32M
×
64 2 bank
SDRAM module
PC100 32M
×
72 2 bank
SDRAM module
PC100 32M
×
64 1 bank
SDRAM module
PC100 32M
×
72 1 bank
SDRAM module
PC100 64M
×
64 2 bank
SDRAM module
PC100 64M
×
72 2 bank
SDRAM module
Module
Height
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
1.25“
Semiconductor Group
2
1998-08-01
HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
Ordering Information
(cont’d)
Type
HYS 64V32200GU-8B
HYS 72V32200GU-8B
HYS 64V64220GU-8B
HYS 72V64220GU-8B
Ordering Code
PC100-323-620
PC100-323-620
PC100-323-620
PC100-323-620
Package
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
L-DIM-168-30
Descriptions
PC100 32M
×
64 1 bank
SDRAM module
PC100 32M
×
72 1 bank
SDRAM module
PC100 64M
×
64 2 bank
SDRAM module
PC100 64M
×
72 2 bank
SDRAM module
Module
Height
1.25“
1.25“
1.25“
1.25“
Pin Names
A0-A12
BA0, BA1
DQ0 - DQ63
CB0-CB7
RAS
CAS
WE
CKE0, CKE1
Address Inputs
CLK0 - CLK3
(RA0 ~ RA10/CA0 ~ CA9)
Bank Selects
Data Input/Output
Check Bits
(× 72 organization only)
Row Address Strobe
Column Address Strobe
Read/Write Input
Clock Enable
DQMB0 - DQMB7
CS0 - CS3
Clock Input
Data Mask
Chip Select
Power (+ 3.3 Volt)
Ground
Clock for Presence Detect
Serial Data Out for Presence
Detect
No Connection
V
CC
V
SS
SCL
SDA
N.C. / DU
Address Format
Part Number
Rows Columns Bank
Select
10
10
10
10
2
2
2
2
Refresh Period
4k
4k
8k
8k
64ms
64ms
64ms
64ms
Interval
15.6
µ
15.6
µ
7.8
µ
7.8
µ
16M
×
64/72 HYS 64/72V16200GU 12
32M
×
64/72 HYS 64/72V32220GU 12
32M
×
64/72 HYS 64/72V32220GU 13
64M
×
64/72 HYS 64/72V64220GU 13
Semiconductor Group
3
1998-08-01
HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
Pin Configuration
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
Symbol
PIN #
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Symbol
PIN #
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
Symbol
PIN #
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Symbol
V
SS
DQ0
DQ1
DQ2
DQ3
V
SS
DU
CS2
DQMB2
DQMB3
DU
V
SS
DQ32
DQ33
DQ34
DQ35
V
SS
CKE0
CS3
DQMB6
DQMB7
NC
V
CC
DQ4
DQ5
DQ6
DQ7
DQ8
V
CC
DQ36
DQ37
DQ38
DQ39
DQ40
V
CC
NC
NC
NC (CB2)
NC (CB3)
V
CC
NC
NC
CB6
CB7
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
SS
DQ16
DQ17
DQ18
DQ19
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
SS
DQ48
DQ49
DQ50
DQ51
V
CC
DQ20
NC
DU
CKE1
V
CC
DQ52
NC
DU
NC
V
CC
DQ14
DQ15
NC (CB0)
NC (CB1)
V
CC
DQ46
DQ47
NC (CB4)
NC (CB5)
V
SS
DQ21
DQ22
DQ23
V
SS
DQ53
DQ54
DQ55
V
SS
NC
NC
V
SS
NC
NC
V
CC
WE
DQMB0
DQMB1
CS0
DU
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
CAS
DQMB4
DQMB5
CS1
RAS
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ28
DQ29
DQ30
DQ31
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
A0
A2
A4
A6
A8
A10
BA1
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
SS
CLK2
NC
WP
SDA
SCL
V
SS
CLK3
NC
SA0
SA1
SA2
V
CC
V
CC
CLK0
V
CC
CLK1
A12
V
CC
V
CC
Note: Pinnames in brackets are for the x72 ECC versions
Semiconductor Group
4
1998-08-01
HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
WE
CS0
DQMB0
DQ(7:0)
CS
WE
DQM
DQ0-DQ7
D0
CS
WE
DQM
DQ0-DQ7
D1
CS
WE
DQM
DQ0-DQ7
D8
DQMB4
DQ(39:32)
CS
WE
DQM
DQ0-DQ7
D4
CS
WE
DQM
DQ0-DQ7
D5
DQMB1
DQ(15:8)
DQMB5
DQ(47:40)
CB(7:0)
CS2
DQMB2
DQ(23:16)
CS
WE
DQM
DQ0-DQ7
D2
CS
WE
DQM
DQ0-DQ7
D3
D0-D7, (D8)
D0-D7, (D8)
C
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
DQMB6
DQ(55:48)
CS
WE
DQM
DQ0-DQ7
D6
CS
WE
DQM
DQ0-DQ7
D7
E
2
PROM (256 word x 8 Bit)
SA0
SA1
SA2
SCL
SA0
SA1
SA2
SCL
SDA
WP
47 k
Ω
DQMB3
DQ(31:24)
DQMB7
DQ(63:56)
A0-A11, (A12), BA0, BA1
V
CC
V
SS
RAS
CAS
CKE0
Clock Wiring
32 M x 64
CLK0
CLK1
CLK2
CLK3
4 SDRAM + 3.3 pF
Termination
4 SDRAM + 3.3 pF
Termination
32 M x 72
5 SDRAM
Termination
4 SDRAM + 3.3 pF
Termination
SPB03970
Note: D8 is only used in the x72 ECC version.
Block Diagram for 16M
×
64/72 & 32M
×
64/72 one bank SDRAM DIMM Modules
(HYS 64/72V16200GU & HYS 64/72V32200GU)
Semiconductor Group
5
1998-08-01
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