EEWORLDEEWORLDEEWORLD

Part Number

Search

3GW8C-30T-FREQ

Description
LVCMOS Output Clock Oscillator, 200.1MHz Min, 800MHz Max, ROHS COMPLIANT, DIP-8/4
CategoryPassive components    oscillator   
File Size86KB,1 Pages
ManufacturerEuroquartz
Websitehttp://www.euroquartz.co.uk/
Environmental Compliance
Download Datasheet Parametric View All

3GW8C-30T-FREQ Overview

LVCMOS Output Clock Oscillator, 200.1MHz Min, 800MHz Max, ROHS COMPLIANT, DIP-8/4

3GW8C-30T-FREQ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Reach Compliance Codecompliant
Maximum control voltage1.85 V
Minimum control voltage1.45 V
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate30 ppm
frequency stability100%
linearity10%
Installation featuresTHROUGH HOLE MOUNT
Maximum operating frequency800 MHz
Minimum operating frequency200.1 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeLVCMOS
Output load15 pF
physical size12.8mm x 12.8mm x 5.08mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountNO
maximum symmetry55/45 %
Base Number Matches1
EURO
QUARTZ
8 pin Dual-in-Line
Frequency range 200.1MHz to 800MHz
LVCMOS Output
Supply Voltage 3.3 VDC
High Q fundamental mode crystal
Low jitter multiplier circuit
DESCRIPTION
OUTLINE & DIMENSIONS
GW42 VCXOs, are packaged in an industry-standard, 4 pad, 11.4mm
x 9.6mm x 2.5mm SMD package. GW42 VCXOs incorporate a high Q
fundamental crystal and a low jitter multiplier circuit.
SPECIFICATION
Frequency Range:
Supply Voltage:
Output Logic:
Integrated Phase Jitter:
Period Jitter RMS:
Period Jitter Peak to peak:
Phase Noise:
Initial Frequency Accuracy:
Output Voltage HIGH (1):
Output Voltage LOW (0):
Pulling Range:
Temperature Stability:
Output Load:
Start-up Time:
Duty Cycle:
Rise/Fall Times:
Current Consumption
<96MHz:
>96MHz:
Linearity:
Modulation Bandwidth:
Input Impedance:
Slope Polarity:
(Transfer function)
GW8 VCXO
200.1MHz ~ 800.0MHz
200.1MHz to 800.0MHz
3.3 VDC ±5%
LVCMOS
2.6ps typical, 4.0ps maximum
(for 155.250MHz)
4.3ps typical (for 155.250MHz)
27.0ps typical (for 155.250MHz)
See table below
Tune to the nominal frequency
with Vc= 1.65 ±0.2VDC
90% Vdd minimum
10% Vdd maximum
From ±30ppm to ±150ppm
See table
15pF
10ms maximum, 5ms typical
50% ±5% measured at 50% Vdd
1.2ns typical (15pF load)
30mA maximum (15pF load)
40mA maximum (15pF load)
10% maximum, 6% typical
25kHz minimum
2 MW minimum
Monotonic and Positive. (An
increase of control voltage
always increases output
frequency.)
-50° to +100°C
±5ppm per year maximum
Not available (4
pad package)
Fully compliant
PHASE NOISE
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
-65dBc/Hz
-95dBc/Hz
-120dBc/Hz
-125dBc/Hz
-121dBc/Hz
-120dBc/Hz
-140dBc/Hz
Storage Temperature:
Ageing:
Enable/Disable (Tristate):
RoHS Status:
FREQUENCY STABILITY
Stability Code Stability ±ppm Temp. Range
A
25
0°~+70°C
B
50
0°~+70°C
C
100
0°~+70°C
D
25
-40°~+85°C
E
50
-40°~+85°C
F
100
-40°~+85°C
If non-standard frequency stability is required
Use ‘I’ followed by stability, i.e. I20 for ±20ppm
PART NUMBERING
Example:
3GW8B-80N-250.00
Supply Voltage
3 = +3.3V
Series Designator
GW8
Stability over temperature range
(See table)
Pullability in ±ppm
Pullability determinator
N = minimum
M = maximum
T = Typical
Frequency in MHz
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 info@euroquartz.co.uk www.euroquartz.co.uk
How to crack Protel 99 SE in Windows 7
1: First find the windows folder in the system disk. 2: Open the windows folder, find the package source program ADVPCB99SE, and open the ADVPCB99SE program. 3: Add package library... Change the dark ...
769936811 PCB Design
Could you help me analyze the reason? Thanks!
I am so worried. The interrupt programs of ADC12 and Time_A run normally. When I add the separately debugged serial program, I still cannot receive complete data. Sometimes even the sampling and outpu...
自由女神 Microcontroller MCU
Usage of the FSRAMPERCENT parameter in CONFIG.BIB
[p=26, null, left][color=#333333][font=Arial][size=14px]The specific settings can be found in Control Panel -> System -> Memory after the system starts. The default is to split the memory 50-50, half ...
gooogleman Linux and Android
Domestic chips recommend Unisplendour chips
Domestic chips recommend Unisplendour chips Model: SC9863A Official introduction: SC9863A is a highly integrated LTE smartphone platform that integrates an octa-core ARM Cortex-A55 processor, IMG8322 ...
你好再见 Domestic Chip Exchange
How to control the number of PWM pulse outputs in STM32
How does STM32 control the number of PWM pulse outputs? I use PWM pulses as the synchronization clock for my peripherals, so I need exact values!...
loolen stm32/stm8
I saw a problem elsewhere and was quite interested. I came here to ask the experts about the occupancy problem in the configuration.
I have seen a problem elsewhere, but I don't know how to do it myself. I am quite interested in it, so I would like to ask an expert to configure a 512*24bit fifo and M4K RAM block. [img]file:///C:\Us...
琉璃珠 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2659  539  1983  1666  1047  54  11  40  34  22 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号