Integrated
Circuit
Systems, Inc.
ICS843051
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
F
EATURES
•
1 differential 3.3V LVPECL output
•
Crystal oscillator interface designed for
18pF parallel resonant crystals
•
RMS phase jitter at:
155.52MHz (12KHz - 20MHz): 0.74ps (typical)
156.25MHz (1.875MHz - 20MHz): 0.43ps (typical)
161.13MHz (1.933MHz - 20MHz): 0.43ps (typical)
•
RMS phase noise at 156.25MHz
Offset
Noise Power
100Hz .................. -95 dBc/Hz
1KHz ................ -110 dBc/Hz
10KHz ................ -125 dBc/Hz
100KHz ................ -125 dBc/Hz
•
3.3V operating supply
•
0°C to 70°C ambient operating temperature
•
Industrial temperature information available upon request
•
Lead-Free package fully RoHS compliant
G
ENERAL
D
ESCRIPTION
The ICS843051 is a Gb Ethernet Generator and a
member of the HiPerClocks
TM
family of high
HiPerClockS™
performance devices from ICS. The ICS843051 can
synthesize 10 Gigabit Ethernet, SONET, or Serial
ATA reference clock frequencies with the
appropriate choice of crystal and output divider. The ICS843051
has excellent phase jitter performance and is packaged in a
small 8-pin TSSOP, making it ideal for use in systems with
limited board space.
ICS
F
REQUENCY
T
ABLE
Inputs
Crystal Frequency (MHz)
20.141601
20.141601
19.53125
19.53125
19.44
19.44
18.75
18.75
FREQ_SEL
0
1
0
1
0
1
0
1
Output Frequency
(MHz)
161.132812
80.566406
156.25
78.125
155.52
77.76
15 0
75
P
IN
A
SSIGNMENT
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q0
nQ0
FREQ_SEL
ICS843051
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
B
LOCK
D
IAGRAM
FREQ_SEL
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
0 ÷4 (default)
1 ÷8
nQ0
Q0
÷32
(fixed)
843051AG
www.icst.com/products/hiperclocks.html
1
REV. A DECEMBER 14, 2004
Integrated
Circuit
Systems, Inc.
ICS843051
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
Type
Power
Power
Input
Input
Description
Analog supply pin.
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Pulldown Frequency select pin. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
Core supply pin.
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2
3,
4
5
6, 7
8
Name
V
CCA
V
EE
XTAL_OUT,
XTAL_IN
FREQ_SEL
nQ0, Q0
V
CC
Output
Power
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characterristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLDOWN
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
KΩ
843051AG
www.icst.com/products/hiperclocks.html
2
REV. A DECEMBER 14, 2004
Integrated
Circuit
Systems, Inc.
ICS843051
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
CC
V
CCA
I
CC
I
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Power Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
70
15
85
Units
V
V
mA
mA
mA
T
ABLE
3B. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
FREQ_SEL
FREQ_SEL
FREQ_SEL
FREQ_SEL
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
-5
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0. 8
150
Units
V
V
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
843051AG
Test Conditions
Minimum
12
Typical
Fundamental
Maximum
40
50
7
Units
MHz
Ω
pF
www.icst.com/products/hiperclocks.html
3
REV. A DECEMBER 14, 2004
Integrated
Circuit
Systems, Inc.
ICS843051
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
Test Conditions
Minimum
Typical
155.52
156.25
161.13
155.52MHz @ Integration Range:
12KHz - 20MHz
156.25MHz @ Integration Range:
1.875MHz - 20MHz
156.25MHz @ Integration Range:
12KHz - 20MHz
161.13MHz @ Integration Range:
1.933MHz - 20MHz
161.13MHz @ Integration Range:
12KHz - 20MHz
20% to 80%
0.74
0.43
0.75
0.43
0.72
325
49
600
51
Maximum
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
%
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
=0°C
TO
70°C
Symbol
f
OUT
Parameter
Output Frequency
t
jit(Ø)
RMS Phase Jitter (Random);
NOTE 1
t
R
/ t
F
Output Rise/Fall Time
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plots following this section.
843051AG
www.icst.com/products/hiperclocks.html
4
REV. A DECEMBER 14, 2004
Integrated
Circuit
Systems, Inc.
ICS843051
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
YPICAL
P
HASE
N
OISE AT
155.52MH
Z
0
-10
-20
-30
-40
-50
-60
-70
➤
Filter
155.52MHz
RMS Phase Noise Jitter
12KHz to 20MHz = 0.74ps (typical)
N
OISE
P
OWER
dBc
Hz
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
100k
1M
10M
100M
Raw Phase Noise Data
➤
Phase Noise Result by adding
a Filter to raw data
O
FFSET
F
REQUENCY
(H
Z
)
T
YPICAL
P
HASE
N
OISE AT
156.25MH
Z
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
➤
➤
Gb Ethernet Filter
156.25MHz
RMS Phase Noise Jitter
1.875MHz to 20MHz = 0.43ps (typical)
0
-10
N
OISE
P
OWER
dBc
Hz
Raw Phase Noise Data
➤
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
➤
10k
Phase Noise Result by adding
Gb Ethernet Filter to raw data
100k
1M
10M
100M
O
FFSET
F
REQUENCY
(H
Z
)
843051AG
www.icst.com/products/hiperclocks.html
5
REV. A DECEMBER 14, 2004
京公网安备 11010802033920号
EEWORLD
