EEWORLDEEWORLDEEWORLD

Part Number

Search

ICS9150-04

Description
Pentium Pro⑩ and SDRAM Frequency Generator
File Size451KB,19 Pages
ManufacturerICS ( IDT )
Websitehttp://www.icst.com
Download Datasheet Compare View All

ICS9150-04 Overview

Pentium Pro⑩ and SDRAM Frequency Generator

Integrated
Circuit
Systems, Inc.
ICS9150-04
Pentium Pro™ and SDRAM Frequency Generator
General Description
The
ICS9150-04
generates all clocks required for high speed
RISC or CISC microprocessor systems such as Intel
PentiumPro or Cyrix. Eight different reference frequency
multiplying factors are selectable from 50 to 83.3MHz.
Features include five CPU, seven PCI and Sixteen SDRAM
clocks. One reference output is available equal to the crystal
frequency, plus three IOAPIC outputs powered by VDDL1.
One 48 MHz for USB is provided plus a 24 MHz. Spread
Spectrum built in up to ±1.5% modulation to reduce EMI.
Serial programming I
2
C interface allows changing functions,
stop clock programing and Frequency selection. Rise time
adjustment for VDD at 3.3V or 2.5V CPU. Additionally, the
device meets the Pentium power-up stabilization, which
requires that CPU and PCI clocks be stable within 2ms after
power-up.
High drive PCICLK and SDRAM outputs typically provide
greater than 1 V/ns slew rate into 30pF loads. CPUCLK outputs
typically provide better than 1V/ns slew rate into 20pF loads
while maintaining 50±5% duty cycle. The REF 24 and 48 MHz
and SDRAM 12, 13 clock outputs typically provide better
than 0.5V/ns slew rates.
•
•
•
•
•
•
•
•
Features
Generates five processor, six bus, one 14.31818MHz
(3.3V) three IOAPIC, 16 SDRAM clocks, 48MHz USB
clock and 24MHz Super I/O clock.
Synchronous clocks skew matched to 250 ps window
on CPUCLKs and 500ps window on PCICLKs
Skew from CPU (earlier) to PCI clock - 1 to 4ns, 2.6ns
nom.
Power Management Control Input pins when MODE
Low
VDD(1:4) - 3.3V ±10%
(inputs 5V tolerant w/series R )
VDDL(1:2) - 2.5V or 3.3V ±5%
I
2
C interface for programming stopclocks plus spread
spectrum options (±0.5% or ±1.5%, center spread or
down spread)
56-pin SSOP package
Pin Configuration
Block Diagram
56-Pin SSOP
Power Groups
Pentium is a trademark of Intel Corporation
I
2
C is a trademark of Philips Corporation.
VDD1 = REF, X1, X2
VDD2 = PCICLK_F, PCICLK(0:5)
VDD3 = SDRAM (0:15), supply for PLL core,
VDD4 = 48MHz, 24MHz
VDDL1 = IOAPIC (0:2)
VDDL2 = CPUCLK (0:4)
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
9150-04 RevD 07/27/98

ICS9150-04 Related Products

ICS9150-04 ICS9150F-04
Description Pentium Pro⑩ and SDRAM Frequency Generator Pentium Pro⑩ and SDRAM Frequency Generator
Performance indicators of power amplifiers
There are many performance indicators of power amplifiers, including output power, frequency response, distortion, signal-to-noise ratio, output impedance, damping coefficient, etc., among which outpu...
fish001 Analogue and Mixed Signal
The final finishing touches of the program, modifying the parameters can be saved to the EEPROM without pressing SET.. Very anxious
The problem and disadvantage now is that if you modify the parameters without pressing SET, the parameters will not be saved in the EEPROM if the power is suddenly cut off. It needs to be modified so ...
pyy1980 MCU
Can STM8STIME2 be used?
STM8S103K3uses timer 2,1. TIME2_CH2 is used for PWM output;2. TIME2_CH3 is used for pulse input capture.Is there any problem with this? ? ?Please give me some advice. . . . ....
wende stm32/stm8
Does STL take up a lot of memory?
Embedded platforms have limited memory. I wonder if STL will take up a lot of extra memory?...
美丽的错误 Embedded System
Anyone who is willing to work on "Smart Home System" is welcome to sign up!!!
Now do a survey, if there are more than 10 people willing to do smart home system, we will start to do it, if not this design will be aborted. If you are willing, please post below, thank you.This inv...
zhaojun_xf DIY/Open Source Hardware
Convex Optimization User Guide
Convex optimization theory has been increasingly used in the DSP field in recent years, including time-frequency analysis, location tracking, filter design, signal waveform design, etc. Convex optimiz...
FYRS DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1997  22  2212  2100  2470  41  1  45  43  50 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号