5962G0150201VYC datasheet, PDF

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5962G0150201VYC: DescriptionRISC Microprocessor, 32-Bit, 12MHz, CMOS, CPGA144, CERAMIC, PGA-144; CategoryThe embedded processor and controller Microcontrollers and processors; File Size692KB，55 Pages; ManufacturerCobham Semiconductor Solutions

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5962G0150201VYC Overview

RISC Microprocessor, 32-Bit, 12MHz, CMOS, CPGA144, CERAMIC, PGA-144

5962G0150201VYC Parametric

Parameter Name	Attribute value
Parts packaging code	PGA
package instruction	PGA,
Contacts	144
Reach Compliance Code	unknown
ECCN code	3A001.A.1.A
Address bus width	16
bit size	32
boundary scan	NO
maximum clock frequency	12 MHz
External data bus width	16
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-CPGA-P144
JESD-609 code	e4
length	39.75 mm
low power mode	YES
Number of terminals	144
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class V
Maximum seat height	4.572 mm
speed	12 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
total dose	500k Rad(Si) V
width	39.75 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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Standard Products

UT1750AR RadHard RISC Microprocessor

Data Sheet

May 2003

FEATURES

Operates in either RISC (Reduced Instruction Set

Computer) mode or MIL-STD-1750A mode

Supports MIL-STD-1750A 32-bit floating-point

operations and 48-bit extended-precision floating-point

operations on chip

Built-in 9600 baud UART

Supports defined MIL-STD-1750A Console Mode of Operation

Full 64K-word address space. Expandable to 1M words with

optional MMU (operand port)

Registers may be in 16-bit word or 32-bit double-word

configurations

RISC

MEMORY

CONTROL

BUS

ARBITRA-

TION

PROCES-

SOR

STATUS

Built-in multiprocessor bus arbitration and Direct Memory Access

support (DMA)

TTL-compatible I/O

Stable 1.5-micron CMOS technology

Full military operating range, -55°C to +125°C, in accordance

with MIL-PRF-38535 for Class Q and V

Typical radiation performance

Total dose: 1.0E6 rads(Si)

SEL Immune . 100 MeV-cm

/mg

LET

(0.25) = 60 MeV-cm

/mg

Saturated Cross Section (cm

) per bit, 1.2E-7

- 2.3E-11 errors/bit-day, Adams to 90% geosynchronous heavy ion

Standard Military Drawing 5962-01502

UART

TIMCLK

TEST

UARTOUT

UARTIN

BRQ

BGNT

BUSY

BGACK

NUI1

NUI2

M1750

STATE1

MME

NUO3

CONSOLE

OSCOUT

OSCIN SYSCLK

OSCILLATOR

/CLOCK

SHIFT REG

PROCESSOR

CONTROL

LOGIC

RISC MAP

GENERAL

PURPOSE

REGISTERS

BIT REG

TBR

RBR

TEMP DEST

TEMP SRC

I/O

MUX

RISC DATA

RISC

ADDRESS

or O/P DISC

RISC

ADDRESS

SYSFL

BTERR

MPAR

MPROT

PFAIL

IOLINT1

IOLINT0

INT0-5

MRST

IC/ICs

RISC

ADD

MUX

ACC

PIPELINE

A MUX

B MUX

BUS

CONTROL

32-BIT ALU

1750 SP

1750 PC

PS0-3

AS0-3

OPERAND

DATA

OP/IN

DTACK

M/IO

R /W R

OPERAND

ADDRESS

ADDR

MUX

Figure 1. UT1750AR Functional Block Diagram

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