IDT54FCT16H245ATE datasheet, PDF

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IDT54FCT16H245ATE: DescriptionFCT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP48; Categorysemiconductor logic; File Size116KB，10 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT54FCT16H245ATE Overview

FCT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP48

IDT54FCT16H245ATE Parametric

Parameter Name	Attribute value
Number of functions	2
Number of terminals	48
Maximum operating temperature	125 Cel
Minimum operating temperature	-55 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
Number of ports	2
Processing package description	CERPACK-48
state	ACTIVE
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	FLATPACK
surface mount	Yes
Terminal form	FLAT
Terminal spacing	0.6350 mm
terminal coating	tin lead
Terminal location	pair
Packaging Materials	Ceramic, Glass-SEALED
Temperature level	MILITARY
series	FCT
Output characteristics	3-ST WITH S-RES
Logic IC type	transceiver
Number of digits	8
Output polarity	TRUE
propagation delay TPD	4.9 ns

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Integrated Device Technology, Inc.

FAST CMOS 16-BIT

BIDIRECTIONAL

TRANSCEIVERS

IDT54/74FCT16245T/AT/CT/ET

IDT54/74FCT162245T/AT/CT/ET

IDT54/74FCT166245T/AT/CT

IDT54/74FCT162H245T/AT/CT/ET

FEATURES:

• Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for

ABT functions

–

Typical t

(o) (Output Skew) < 250ps

– Low input and output leakage

≤

1µA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

– Extended commercial range of -40°C to +85°C

• Features for FCT16245T/AT/CT/ET:

– High drive outputs (-32mA I

, 64mA I

)

– Power off disable outputs permit “live insertion”

– Typical V

OLP

(Output Ground Bounce) < 1.0V at

= 5V, T

= 25°C

• Features for FCT162245T/AT/CT/ET:

– Balanced Output Drivers:

±24mA

(commercial),

±16mA

(military)

– Reduced system switching noise

– Typical V

OLP

(Output Ground Bounce) < 0.6V at

= 5V,T

= 25°C

DESCRIPTION:

The 16-bit transceivers are built using advanced dual metal

CMOS technology. These high-speed, low-power transceiv-

ers are ideal for synchronous communication between two

busses (A and B). The Direction and Output Enable controls

operate these devices as either two independent 8-bit trans-

ceivers or one 16-bit transceiver. The direction control pin

(xDIR) controls the direction of data flow. The output enable

pin (x

) overrides the direction control and disables both

ports. All inputs are designed with hysteresis for improved

noise margin.

The FCT16245T are ideally suited for driving high-capaci-

tance loads and low-impedance backplanes. The output buff-

ers are designed with power off disable capability to allow "live

insertion" of boards when used as backplane drivers.

The FCT162245T have balanced output drive with current

limiting resistors. This offers low ground bounce, minimal

undershoot, and controlled output fall times– reducing the

need for external series terminating resistors. The

FCT162245T are plug-in replacements for the FCT16245T

and ABT16245 for on-board interface applications.

The FCT166245T are suited for very low noise, point-to-

point driving where there is a single receiver, or a light lumped

FUNCTIONAL BLOCK DIAGRAM

DIR

2545 drw 01

DIR

2545 drw 02

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

Integrated Device Technology, Inc.

AUGUST 1996

DSC-2545/9

5.3

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