IDT7026S25J datasheet, PDF - EEWORLD Datasheet

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IDT7026S25J: Description16K X 16 DUAL-PORT SRAM, 25 ns, CPGA84; Categorystorage; File Size187KB，18 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT7026S25J Overview

16K X 16 DUAL-PORT SRAM, 25 ns, CPGA84

IDT7026S25J Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	84
Maximum operating temperature	125 Cel
Minimum operating temperature	-55 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
maximum access time	25 ns
Processing package description	CERAMIC, PGA-84
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	GRID ARRAY
Terminal form	PIN/PEG
Terminal spacing	2.54 mm
terminal coating	TIN LEAD
Terminal location	PERPENDICULAR
Packaging Materials	CERAMIC, METAL-SEALED COFIRED
Temperature level	MILITARY
memory width	16
organize	16K X 16
storage density	262144 deg
operating mode	ASYNCHRONOUS
Number of digits	16384 words
Number of digits	16K
Memory IC type	DUAL-PORT SRAM
serial parallel	PARALLEL

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HIGH-SPEED

16K x 16 DUAL-PORT

STATIC RAM

Integrated Device Technology, Inc.

IDT7026S/L

FEATURES:

• True Dual-Ported memory cells which allow simulta-

neous access of the same memory location

• High-speed access

— Military: 25/35/55ns (max.)

— Commercial: 20/25/35/55ns (max.)

• Low-power operation

— IDT7026S

Active: 750mW (typ.)

Standby: 5mW (typ.)

— IDT7026L

Active: 750mW (typ.)

Standby: 1mW (typ.)

• Separate upper-byte and lower-byte control for

multiplexed bus compatibility

• IDT7026 easily expands data bus width to 32 bits or

more using the Master/Slave select when cascading

more than one device

• M/

= H for

BUSY

output flag on Master,

= L for

BUSY

input on Slave

• On-chip port arbitration logic

• Full on-chip hardware support of semaphore signaling

between ports

• Fully asynchronous operation from either port

• TTL-compatible, single 5V (±10%) power supply

• Available in 84-pin PGA and 84-pin PLCC

• Industrial temperature range (–40°C to +85°C) is avail-

able, tested to military electrical specifications

FUNCTIONAL BLOCK DIAGRAM

I/O

-I/O

15L

I/O

Control

I/O

-I/O

I/O

Control

I/O

-I/O

15R

I/O

-I/O

BUSY

(1,2)

BUSY

Address

Decoder

(1,2)

13L

MEMORY

ARRAY

Address

Decoder

13R

ARBITRATION

SEMAPHORE

LOGIC

SEM

NOTES:

1. (MASTER):

BUSY

is output; (SLAVE):

BUSY

is input.

BUSY

outputs are non-tri-stated push-pull.

SEM

2939 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MILITARY AND COMMERCIAL TEMPERATURE RANGES

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

OCTOBER 1996

DSC 2939/3

6.17

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