DPS128M8N-85M datasheet, PDF - EEWORLD Datasheet

DPS128M8N-85M: DescriptionStandard SRAM, 128KX8, 85ns, CMOS, CDIP32, 0.600 INCH, CERAMIC, SIDE BRAZED, DIP-32; Categorystorage storage; File Size368KB，8 Pages; ManufacturerForce Technologies Ltd.

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DPS128M8N-85M Overview

Standard SRAM, 128KX8, 85ns, CMOS, CDIP32, 0.600 INCH, CERAMIC, SIDE BRAZED, DIP-32

Parameter Name	Attribute value
package instruction	DIP,
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	85 ns
JESD-30 code	R-CDIP-T32
length	40.64 mm
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX8
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Maximum seat height	4.191 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
Base Number Matches	1

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