PI74FCT16543T
PI74FCT162543T
PI74FCT162H543T
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Fast CMOS 16-Bit
Latched Transceivers
Product Features:
Common Features:
• PI74FCT16543T, PI74FCT162543T and PI74FCT162H543T
are high-speed,
low power devices with high current drive.
• V
CC
= 5V ±10%
• Hysteresis on all inputs
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16543T Features:
• High output drive: I
OH
= –32 mA; I
OL
= 64 mA
• Power off disable outputs permit “live insertion”
• Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162543T Features:
• Balanced output drivers: ±24 mA
• Reduced system switching noise
• Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25°C
PI74FCT162H543T Features:
•
Bus Hold retains last active state during 3-state
• Eliminates the need for external pull-up resistors
Product Description:
Pericom Semiconductor’s PI74FCT series of logic circuits are pro-
duced in the Company’s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
ThePI74FCT16543T,PI74FCT162543TandPI74FCT162H543T are 16-
bit latched transceivers organized with two sets of eight
D-type latches with separate input and output controls for each set.
For data flow from A to B, for example, the A-to-B Enable
(xCEAB) input must be LOW in order to enter data from xAx or to
take data from xBx, as indicated in the Truth Table. With xCEAB
LOW, a LOW signal makes the A-to-B latches transparent; a
subsequent LOW-to-HIGH transition of the xLEAB signal puts the
A latches in the storage mode and their outputs no longer change the
A inputs. With xCEAB and xOEAB both LOW, the 3-state B output
buffers are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the xCEBA,
xLEBA, and xOEBA inputs.
The PI74FCT16543T output buffers are designed with a Power-Off
disable allowing “live insertion”of boards when used as backplane
drivers.
The PI74FCT162543T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H543T has “Bus Hold” which retains the input’s
last state whenever the input goes to high-impedance preventing
“floating” inputs and eliminating the need for pull-up/down
resistors.
2
OEBA
Logic Block Diagram
1
OEBA
1
CEBA
2
CEBA
1
LEBA
1
OEAB
2
LEBA
2
OEAB
1
CEAB
2
CEAB
1
LEAB
1
A
0
C
1
B
0
2
LEAB
2
A
0
C
2
B
0
D
C
C
D
D
D
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2038B
01/10/01
Product Pin Description
Pin Name
xOEAB
xOEBA
xCEAB
xCEBA
xLEAB
xLEBA
xAx
xBx
GND
V
CC
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or B-to-A 3-State Outputs
(1)
Ground
Power
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
Truth Table
(1)
Latch
Inputs
Status
X
LEAB
X
OEAB
X
A
X TO X
B
X
X
X
Storing
H
X
Storing
X
L
H
H
L
L
Output
Buffers
X
B
X
High Z
X
X
CEAB
H
X
X
L
L
X
High Z
Transparent Current A Inputs
Storing Previous* A Inputs
Note:
1. For the PI74FCT162H543T, these pins have “Bus
Hold.” All other pins are standard, outputs, or I/Os.
Notes:
1. *Before xLEAB LOW-to-HIGH Transistion
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care or Irrelevant
Z = High Impedance
2. A-to-B data flow shown. B-to-A flow control is the same,
except using xCEBA, xLEBA, and xOEBA.
Product Pin Configuration
1
OEAB
1
LEAB
1
CEAB
1
2
3
4
5
6
7
8
9
56
55
54
53
52
51
50
49
1
OEBA
1
LEBA
1
CEBA
GND
1
A
0
1
A
1
GND
1
B
0
1
B
1
VCC
1
A
2
1
A
3
1
A
4
VCC
1
B
2
1
B
3
1
B
4
GND
1
A
5
1
A
6
1
A
7
2
A
0
2
A
1
2
A
2
GND
2
A
3
2
A
4
2
A
5
V
CC
2
A
6
2
A
7
GND
2
CEAB
2
LEAB
2
OEAB
56-PIN
48
10
V56
47
A56
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
GND
1
B
5
1
B
6
1
B
7
2
B
0
2
B
1
2
B
2
GND
2
B
3
2
B
4
2
B
5
V
CC
2
B
6
2
B
7
GND
2
CEBA
2
LEBA
2
OEBA
2
PS2038B
01/10/01
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PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... –65°C to +150°C
Ambient Temperature with Power Applied .................................... –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5.0V ± 10%)
Parameters Description
V
IH
V
IL
I
IH
I
IH
I
IH
I
IH
I
IL
I
IL
I
IL
I
IL
I
BHH
I
BHL
I
OZH
(5)
I
OZL
(5)
V
IK
I
OS
I
O
V
H
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input HIGH Current
Input LOW Current
Input LOW Current
Input LOW Current
Input LOW Current
Bus Hold
Sustain Current
High-Impedance
Output Current
(3-S
TATE
O
UTPUTS
)
Clamp Diode Voltage
Short Circuit Current
Output Drive Current
Input Hysteresis
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Standard Input, V
CC
= Max.
Standard I/O, V
CC
= Max.
Bus Hold Input
(4)
, V
CC
= Max.
Bus Hold I/O
(4)
, V
CC
= Max.
Standard Input, V
CC
= Min.
Standard I/O, V
CC
= Min.
Bus Hold Input
(4)
, V
CC
= Min.
Bus Hold I/O
(4)
, V
CC
= Min.
Bus Hold Input
(4)
, V
CC
= Min.
V
CC
= Max.
V
CC
= Max.
V
CC
= Min., I
IN
= –18 mA
V
CC
= Max.
(3)
, V
OUT
= GND
V
CC
= Max.
(3)
, V
OUT
= 2.5V
Min.
2.0
V
IN
= V
CC
V
IN
= V
CC
V
IN
= V
CC
V
IN
= V
CC
V
IN
= GND
V
IN
= GND
V
IN
= GND
V
IN
= GND
V
IN
= 2.0V
V
IN
= 0.8V
V
OUT
= 2.7V
V
OUT
= 0.5V
0.8
1
1
±100
±100
–1
–1
±100
±100
–50
+50
1
–1
–0.7
–140
100
–1.2
–200
–180
Typ
(2)
Max.
Units
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
V
mA
mA
m
V
–80
–50
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. This specification does not apply to bi-directional functionalities with Bus Hold.
3
PS2038B
01/10/01
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PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
PI74FCT16543T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
V
OH
Output HIGH Voltage
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= –3.0 mA
I
OH
= –15.0 mA
I
OH
= –32.0 mA
I
OL
= 64 mA
Min.
2.5
2.4
2.0
—
Typ
(2)
3.5
3.5
3.0
0.2
—
Max.
Units
V
V
OL
I
OFF
Output LOW Voltage
Power Down Disable
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= 0V, V
IN
or V
OUT
≤
4.5V
0.55
±100
V
µA
PI74FCT162543T/162H543T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
V
OH
V
OL
I
ODL
I
ODH
Output HIGH Voltage
Output LOW Voltage
Output LOW Current
Output HIGH Current
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= –24.0 mA
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 24 mA
V
CC
= 5V, V
IN
= V
IH OR
V
IL
, V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
= V
IH OR
V
IL
, V
OUT
= 1.5V
(3)
Min.
2.4
60
–60
Typ
(2)
3.3
0.3
115
–115
Max.
0.55
150
–150
Units
V
V
mA
mA
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
4.5
5.5
Max.
6
8
Units
pF
pF
Notes:
1. For Max. or Min.conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
4
PS2038B
01/10/01
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PI74FCT16543/162543/162H543T
16-BIT LATCHED TRANSCEIVERS
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max.
V
IN
= GND or V
CC
V
IN
= 3.4V
(3)
Min.
Typ
(2)
0.1
0.5
60
Max.
500
1.5
100
Units
µA
mA
µA/
MHz
V
CC
= Max., Outputs Open V
IN
= V
CC
xCEAB & xOEAB = GND V
IN
= GND
xCEBA = V
CC
One Bit Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
I
= 10 MH
Z
50% Duty Cycle
xLEAB, xCEAB, and
xOEAB = GND
xCEBA = V
CC
One Bit Toggling
V
CC
= Max.,
Outputs Open
f
I
= 2.5 MH
Z
50% Duty Cycle
xLEAB, xCEAB, and
xOEAB = GND
xCEBA = V
CC
16 Bits Toggling
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply
Current
(6)
0.6
1.5
(5)
mA
V
IN
= 3.4V
V
IN
= GND
0.9
2.3
(5)
V
IN
= V
CC
V
IN
= GND
2.4
4.5
(5)
V
IN
= 3.4V
V
IN
= GND
6.4
16.5
(5)
Notes:
1. For Max. or Min. conditions , use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
5
PS2038B
01/10/01
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