DS1075M-80 datasheet, PDF - EEWORLD Datasheet

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DS1075M-80: Description80 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8; CategoryThe embedded processor and controller Microcontrollers and processors; File Size934KB，19 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/

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DS1075M-80 Overview

80 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8

DS1075M-80 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Rochester Electronics
Parts packaging code	DIP
package instruction	DIP,
Contacts	8
Reach Compliance Code	unknown
JESD-30 code	R-PDIP-T8
JESD-609 code	e0
length	9.375 mm
Humidity sensitivity level	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	80 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	240
Master clock/crystal nominal frequency	50 MHz
Certification status	COMMERCIAL
Maximum seat height	4.572 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	20
width	7.62 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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DS1075

PIN DESCRIPTIONS

Input/Output Pin (IN/OUT): This pin is the main oscillator output, with a frequency determined by clock

reference, M and N dividers. Except in programming mode this pin is always an output and will be

referred to as “OUT”. In programming mode this pin will be referred to as “IN”.

External Oscillator Input (OSCIN):

This pin can be used to supply an external reference frequency to

the device.

Crystal Oscillator Connection (XTAL):

A crystal can be connected between this pin and OSCIN to

provide an alternative frequency reference. If a crystal is not used this pin should be left open.

Output Enable Function (OE pin):

The DS1075 also features a “synchronous” output enable. When

OE is at a high logic level the oscillator free runs. When this pin is taken low OUT is held low,

immediately if OUT is already low, or at it’s next high-to-low transition if OUT is high. This prevents

any possible truncation of the output pulse width when the enable is used. While the output is disabled

the master oscillator continues to run (producing an output at OUT0, if the

EN0

bit = 0) but the internal

counters (/N) are reset. This results in a constant phase relationship between OE’s return to a high level

and the resulting OUT signal. When the enable is released OUT will make its first transition within one

to two clock periods of the master clock.

Power-Down/Select Function (

PDN

SELX

PDN/SELX pin):

The Power-Down/Select (

PDN

SELX

) pin

has a user-selectable function determined by one bit (

PDN

bit) of the user-programmable memory.

According to which function is selected, this pin will be referred to as

PDN

SELX

If the Power-Down function is selected (PDN bit = 1) a low logic level on this pin can be used to make

the device stop oscillating (active low) and go into a reduced power consumption state. The “Enabling

Sequencer” circuitry will first disable OUT in the same way as when OE is used. Next OUT0 will be

disabled in a similar fashion. Finally the oscillator circuitry will be disabled. In this mode both outputs

will go into a high impedance state. The power consumption in the power-down state is much less than if

OE is used because the internal oscillator (if used) is completely powered down. Even if an external

reference or a crystal is used all of the on-chip buffers are powered down to minimize current drain.

Consequently the device will take considerably longer to recover (i.e., achieve stable oscillation) from a

power-down condition than if the OE is used.

If the Select function is chosen (PDN bit = 0) this pin can be used to switch between the internal

oscillator and an external reference (or crystal) on the fly. When this mode is chosen the E/

select bit is

overridden, a high logic level on

SELX

will select the internal oscillator, a low logic level will select the

external reference (or crystal oscillator).

Reference Output (OUT0 pin):

A reference output, OUT0, is also available from the output of the

reference select mux. This output is especially useful as a buffered output of a crystal defined master

frequency. OUT0 is unaffected by the OE pin, but is disabled in a glitchless fashion if the device is

powered down. If this output is not required it can be permanently disabled by setting the

EN0

bit to one,

and there will be a corresponding reduction in overall power consumption.

USER-PROGRAMMABLE REGISTERS

The following registers can be programmed by the user to determine operating frequency and mode of

operation. Details of how these registers are programmed can be found in a later section, in this section

3 of 18

DS1075M-80 Related Products

	DS1075M-80	DS1075M-60	DS1075M-66	DS1075Z-80	DS1075M-100
Description	80 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8	60 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8	66.667 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8	80 MHz, OTHER CLOCK GENERATOR, PDSO8, 0.150 INCH, SOIC-8	100 MHz, OTHER CLOCK GENERATOR, PDIP8, 0.300 INCH, DIP-8
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics
Parts packaging code	DIP	DIP	DIP	SOIC	DIP
package instruction	DIP,	DIP,	DIP,	SOP,	DIP,
Contacts	8	8	8	8	8
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
JESD-30 code	R-PDIP-T8	R-PDIP-T8	R-PDIP-T8	R-PDSO-G8	R-PDIP-T8
JESD-609 code	e0	e0	e0	e0	e0
length	9.375 mm	9.375 mm	9.375 mm	4.9 mm	9.375 mm
Humidity sensitivity level	1	1	1	NOT APPLICABLE	1
Number of terminals	8	8	8	8	8
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C
Maximum output clock frequency	80 MHz	60 MHz	66.667 MHz	80 MHz	100 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP	DIP	SOP	DIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	SMALL OUTLINE	IN-LINE
Peak Reflow Temperature (Celsius)	240	240	240	245	240
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz	50 MHz
Certification status	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Maximum seat height	4.572 mm	4.572 mm	4.572 mm	1.75 mm	4.572 mm
Maximum supply voltage	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	YES	NO
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	GULL WING	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	20	20	20	NOT SPECIFIED	20
width	7.62 mm	7.62 mm	7.62 mm	3.9 mm	7.62 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1	1	1	1

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