EEWORLDEEWORLDEEWORLD

Part Number

Search

BUK9628-55/T3

Description
TRANSISTOR 40 A, 55 V, 0.028 ohm, N-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power
CategoryDiscrete semiconductor    The transistor   
File Size68KB,8 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

BUK9628-55/T3 Overview

TRANSISTOR 40 A, 55 V, 0.028 ohm, N-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power

BUK9628-55/T3 Parametric

Parameter NameAttribute value
package instructionSMALL OUTLINE, R-PSSO-G2
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresLOGIC LEVEL COMPATIBLE, ESD PROTECTED
Avalanche Energy Efficiency Rating (Eas)70 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage55 V
Maximum drain current (ID)40 A
Maximum drain-source on-resistance0.028 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSSO-G2
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)160 A
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
Philips Semiconductors
Product specification
TrenchMOS™ transistor
Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope suitable for surface
mounting. Using ’trench’ technology
the device features very low on-state
resistance and has integral zener
diodes giving ESD protection up to
2kV. It is intended for use in
automotive and general purpose
switching applications.
BUK9628-55
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V
GS
= 5 V
MAX.
55
40
96
175
28
UNIT
V
A
W
˚C
mΩ
PINNING - SOT404
PIN
1
2
3
mb
gate
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
d
g
2
1
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
10
40
28
160
96
175
UNIT
V
V
V
A
A
A
W
˚C
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage, all pins
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
MIN.
-
MAX.
2
UNIT
kV
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
Minimum footprint, FR4
board
TYP.
-
50
MAX.
1.56
-
UNIT
K/W
K/W
April 1998
1
Rev 1.100
Portable and Automotive Compressed Audio and Video Solutions
Today, the rapid growth of compressed audio entertainment is no longer limited to the home and portable device markets. In fact, digital and "soft" audio products are rapidly entering the automotive i...
frozenviolet Automotive Electronics
What are new energy vehicles?
[table=95%][tr][td][b][color=#000000]What are new energy vehicles? [/color][/b][/td][/tr][tr][td] According to the definition in the announcement of the National Development and Reform Commission, new...
babbage Energy Infrastructure?
Design of DVB_T Single Frequency Network in Shanghai
The basic concepts and characteristics of terrestrial digital video broadcasting and single frequency network are introduced. The design model of single frequency network is analyzed. The networking m...
JasonYoo Embedded System
Which microcontroller with built-in segment LCD controller is the cheapest?
I want to make a segment LCD display recently, but the lower the cost, the better. Which microcontroller (with built-in LCD controller) is cheaper? 8-bit, 16-bit, 32-bit are all fine. Currently it is ...
hmy0569 MCU
Let's work together to create a good forum environment!
Hey, I just registered on the World Forum of Electronic Engineering today. From now on, I am a member of the World Forum of Electronic Engineering. Let's work together to create a good forum environme...
yongkundj Talking
[Transfer] How to configure SOC HPS in Qsys tool and introduce GHRD project of DE1_SOC
[align=left][b][font=宋体]Methods for configuring SOC HPS in Qsys tool and introducing GHRD project of DE1_SOC[/font][/b][/align][align=left][b][font=宋体] [/font][/b][/align][align=left][font=宋体]This art...
chenzhufly FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2396  2524  1911  2849  2418  49  51  39  58  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号