CAT24C01VP2IG datasheet, PDF - EEWORLD Datasheet

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CAT24C01VP2IG: DescriptionEEPROM, 128X8, Serial, CMOS, PDSO8; Categorystorage storage; File Size419KB，17 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/; Environmental Compliance

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CAT24C01VP2IG Overview

EEPROM, 128X8, Serial, CMOS, PDSO8

CAT24C01VP2IG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Catalyst
package instruction	SON, SOLCC8,.11,20
Reach Compliance Code	unknown
Data retention time - minimum	100
Durability	1000000 Write/Erase Cycles
I2C control byte	1010DDDR
JESD-30 code	R-PDSO-N8
memory density	1024 bit
Memory IC Type	EEPROM
memory width	8
Number of terminals	8
word count	128 words
character code	128
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128X8
Package body material	PLASTIC/EPOXY
encapsulated code	SON
Encapsulate equivalent code	SOLCC8,.11,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
power supply	2/5 V
Certification status	Not Qualified
Serial bus type	I2C
Maximum standby current	0.000002 A
Maximum slew rate	0.001 mA
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
write protect	HARDWARE
Base Number Matches	1

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CAT24C01/02/04/08/16

FEATURES

■

Supports Standard and Fast I

C Protocol

■

1.8 V to 5.5 V Supply Voltage Range

■

16-Byte Page Write Buffer

■

Hardware Write Protection for entire memory

■

Schmitt Triggers and Noise Suppression Filters

1-Kb, 2-Kb, 4-Kb, 8-Kb and 16-Kb CMOS Serial EEPROM

DEVICE DESCRIPTION

The CAT24C01/02/04/08/16 are 1-Kb, 2-Kb, 4-Kb,

8-Kb and 16-Kb respectively CMOS Serial EEPROM

devices organized internally as 8/16/32/64 and 128

pages respectively of 16 bytes each. All devices support

both the Standard (100 kHz) as well as Fast (400 kHz)

C protocol.

Data is written by providing a starting address, then

loading 1 to 16 contiguous bytes into a Page Write

Buffer, and then writing all data to non-volatile memory

in one internal write cycle. Data is read by providing a

starting address and then shifting out data serially while

automatically incrementing the internal address count.

External address pins make it possible to address

up to eight CAT24C01 or CAT24C02, four CAT24C04,

two CAT24C08 and one CAT24C16 device on the

same bus.

on I

C Bus Inputs (SCL and SDA).

■

Low power CMOS technology

■

1,000,000 program/erase cycles

■

100 year data retention

■

Industrial temperature range

■

RoHS-compliant 8-lead PDIP, SOIC, MSOP

and TSSOP, 8-pad TDFN and 5-lead TSOT-23

packages.

For Ordering Information details, see page 16.

PIN CONFIGURATION

PDIP (L)

SOIC (W)

TSSOP (Y)

MSOP (Z)

TDFN (VP2)

CAT24C16 / 08 / 04 / 02 / 01

NC / NC / NC / A0 / A0

NC / NC / A1 / A1 / A1

NC / A2 / A2 / A2 / A2

VSS

VCC

SCL

SDA

FUNCTIONAL SYMBOL

VCC

TSOT-23 (TD)

SCL

VSS

SDA

VCC

SCL

A2, A1, A0

CAT24Cxx

SDA

For the location of Pin 1, please consult the corresponding package drawing.

PIN FUNCTIONS

, A

SDA

SCL

Device Address Inputs

Serial Data Input/Output

Serial Clock Input

Write Protect Input

Power Supply

Ground

No Connect

* Catalyst carries the I

C protocol under a license from the Philips Corporation.

VSS

Characteristics subject to change without notice

Doc. No. MD-1115, Rev. D

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