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74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs
April 2007
74AC253, 74ACT253
Dual 4-Input Multiplexer with 3-STATE Outputs
Features
■
I
CC
and I
OZ
reduced by 50%
■
Multifunction capability
■
Non inverting 3-STATE outputs
■
Outputs source/sink 24mA
■
ACT253 has TTL-compatible inputs
tm
General Description
The AC/ACT253 is a dual 4-input multiplexer with
3-STATE outputs. It can select two bits of data from four
sources using common select inputs. The outputs may
be individually switched to a high impedance state with a
HIGH on the respective Output Enable (OE) inputs,
allowing the outputs to interface directly with bus
oriented systems.
Ordering Information
Order Number
74AC253SC
74AC253SJ
74AC253PC
74ACT253SC
74ACT253SJ
74ACT253MTC
Package
Number
M16A
M16D
N16E
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Device also available Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Descriptions
Pin Names
I
0a
–I
3a
I
0b
–I
3b
S
0
, S
1
OE
a
OE
b
Z
a
, Z
b
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Output Enable Input
Side B Output Enable Input
3-STATE Outputs
FACT™ is a trademark of Fairchild Semiconductor Corporation.
©1988 Fairchild Semiconductor Corporation
74AC253, 74ACT253 Rev. 1.5
www.fairchildsemi.com
74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs
Logic Diagram
Functional Description
The AC/ACT253 contains two identical 4-input multiplex-
ers with 3-STATE outputs. They select two bits from four
sources selected by common Select inputs (S
0
, S
1
). The
4-input multiplexers have individual Output Enable (OE
a
,
OE
b
) inputs which, when HIGH, force the outputs to a
high impedance (High Z) state. This device is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for
the outputs are shown:
IEEE/IEC
Z
a
=
OE
a
• (I
0a
• S
1
• S
0
+ I
1a
• S
1
• S
0
+
I
2a
• S
1
• S
0
+ I
3a
• S
1
• S
0
)
Z
b
=
OE
b
• (I
0b
• S
1
• S
0
+ I
1b
• S
1
• S
0
+
I
2b
• S
1
• S
0
+ I
3b
• S
1
• S
0
)
If the outputs of 3-STATE devices are tied together, all
but one device must be in the high impedance state to
avoid high currents that would exceed the maximum
ratings. Designers should ensure that Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so that there is no overlap.
Truth Table
Select Inputs
S
0
X
L
L
H
H
L
L
H
H
Data Inputs
I
0
X
L
H
X
X
X
X
X
X
Output Enable
I
3
X
X
X
X
X
X
X
L
H
Outputs
Z
Z
L
H
L
H
L
H
L
H
S
1
X
L
L
L
L
H
H
H
H
I
1
X
X
X
L
H
X
X
X
X
I
2
X
X
X
X
X
L
H
X
X
OE
H
L
L
L
L
L
L
L
L
Address Inputs S
0
and S
1
are common to both sections.
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
©1988 Fairchild Semiconductor Corporation
74AC253, 74ACT253 Rev. 1.5
www.fairchildsemi.com
2
74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Figure 1.
©1988 Fairchild Semiconductor Corporation
74AC253, 74ACT253 Rev. 1.5
www.fairchildsemi.com
3
74AC253, 74ACT253 Dual 4-Input Multiplexer with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
V
I
=
–0.5V
V
I
=
V
CC
+ 0.5V
V
I
I
OK
DC Input Voltage
DC Output Diode Current
V
O
=
–0.5V
V
O
=
V
CC
+ 0.5V
V
O
I
O
DC Output Voltage
Parameter
Rating
–0.5V to +7.0V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±50mA
±50mA
–65°C to +150°C
140°C
DC Output Source or Sink Current
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin
T
STG
Storage Temperature
T
J
Junction Temperature
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
Supply Voltage
AC
ACT
V
I
V
O
T
A
∆
V /
∆
t
∆
V /
∆
t
Input Voltage
Output Voltage
Operating Temperature
Parameter
Rating
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
–40°C to +85°C
125mV/ns
125mV/ns
Minimum Input Edge Rate, AC Devices:
V
IN
from 30% to 70% of V
CC
, V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate, ACT Devices:
V
IN
from 0.8V to 2.0V, V
CC
@ 4.5V, 5.5V
©1988 Fairchild Semiconductor Corporation
74AC253, 74ACT253 Rev. 1.5
www.fairchildsemi.com
4
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