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IDT79RV4650

Description
EMBEDDED 64-BIT ORION ? RISC MICROPROCESSOR
File Size453KB,25 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet View All

IDT79RV4650 Overview

EMBEDDED 64-BIT ORION ? RISC MICROPROCESSOR

Low-Cost 64-bit
RISController
w/DSP Capability
Features
High-performance embedded 64-bit microprocessor
– 64-bit integer operations
– 64-bit registers
– 100MHz, 133MHz, 150 MHz, 180MHz, 200MHz and 267MHz
operation frequencies
High-performance DSP capability
– 133.5 Million Integer Multiply-Accumulate Operations/sec @
267 MHz
High-performance microprocessor
– 133.5 M Mul-Add/second at 267MHz
– 89 MFL0P/s at 250MHz
– >640,000 dhrystone (2.1)/sec capability at 267MHz
(352 dhrystone MIPS)
High level of integration
– 64-bit, 267 MHz integer CPU
– 8KB instruction cache; 8KB data cache
– Integer multiply unit with 133.5M Mul-Add/sec
Low-power operation
– Active power management powers-down inactive units
– Standby mode
Upwardly software compatible with IDT RISController
Family
IDT79RC4650
Large, efficient on-chip caches
– Separate 8kB Instruction and 8kB Data caches
– Over 3200MB/sec bandwidth from internal caches
– 2-set associative
– Write-back and write-through support
– Cache locking to facilitate deterministic response
Bus compatible with RC4000 family
– System interface provides bandwidth up to 1000 MB/S
– Direct interface to 32-bit wide or 64-bit wide systems
– Synchronized to external reference clock for multi-master
operation
– Socket compatible with IDT RC64475 and RC64575
Improved real-time support
– Fast interrupt decode
Optional cache locking
Note:“R” refers to 5V parts; “RV” refers to 3.3V parts; “RC”
refers to both
Block Diagram
352 MIPS 64-bit CPU
64-bit register file
64-bit adder
Pipeline Control
System Control Coprocessor
Address Translation/
Cache Attribute Control
89MFLOPS Single-Precision FPA
FP register file
Load aligner
Store Aligner
Logic Unit
High-Performance
Integer Multiply
Exception Management
Functions
Pipeline Control
Pack/Unpack
FP Add/Sub/Cvt/
Div/Sqrt
FP Multiply
Control Bus
Data Bus
Instruction Bus
Instruction Cache
Set A
(Lockable)
Instruction Cache
Set B
32-/64-bit
Synchronized
System Interface
Data Cache
Set A
(Lockable)
Data Cache
Set B
The IDT logo is a trademark and ORION, RC4600, RC4650, RV4650, RC4700, RC3081, RC3052, RC3051, RC3041, RISController, and RISCore are trademarks of Integrated Device Technology, Inc.
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©
2001 Integrated Device Technology, Inc.
April 10, 2001
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