Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope
available in TO220AB and SOT404 .
Using ’trench’ technology which
features
very
low
on-state
resistance. It is intended for use in
automotive and general purpose
switching applications.
BUK7528-100A
BUK7628-100A
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V
GS
= 10 V
MAX.
100
47
166
175
28
UNIT
V
A
W
˚C
mΩ
PINNING
TO220AB & SOT404
PIN
1
2
3
DESCRIPTION
gate
drain
2
PIN CONFIGURATION
mb
tab
SYMBOL
d
g
3
SOT404
1 2 3
source
1
tab/mb drain
TO220AB
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
MIN.
-
-
-
-
-
-
-
- 55
MAX.
100
100
20
47
33
187
166
175
UNIT
V
V
V
A
A
A
W
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
R
th j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient(TO220AB)
Thermal resistance junction to
ambient(SOT404)
CONDITIONS
-
in free air
Minimum footprint, FR4
board
TYP.
-
60
50
MAX.
0.9
-
-
UNIT
K/W
K/W
K/W
March 2000
1
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
STATIC CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL
V
(BR)DSS
V
GS(TO)
I
DSS
I
GSS
R
DS(ON)
PARAMETER
Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA;
T
j
= -55˚C
V
DS
= V
GS
; I
D
= 1 mA
T
j
= 175˚C
T
j
= -55˚C
V
DS
= 100 V; V
GS
= 0 V;
V
GS
=
±20
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 25 A
T
j
= 175˚C
T
j
= 175˚C
MIN.
100
89
2
1
-
-
-
-
-
-
BUK7528-100A
BUK7628-100A
TYP.
-
-
3
-
-
0.05
-
2
20
-
MAX.
-
-
4
-
4.4
10
500
100
28
76
UNIT
V
V
V
V
V
µA
µA
nA
mΩ
mΩ
DYNAMIC CHARACTERISTICS
T
mb
= 25˚C unless otherwise specified
SYMBOL
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
d
L
d
L
s
PARAMETER
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal drain inductance
Internal drain inductance
Internal source inductance
CONDITIONS
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
MIN.
-
-
-
-
-
-
-
-
-
-
-
TYP.
2320
315
187
15
70
83
45
4.5
3.5
2.5
7.5
MAX.
3100
378
256
23
105
116
63
-
-
-
-
UNIT
pF
pF
pF
ns
ns
ns
ns
nH
nH
nH
nH
V
DD
= 30 V; R
load
=1.2Ω;
V
GS
= 10 V; R
G
= 10
Ω
Measured from drain lead 6 mm
from package to centre of die
Measured from contact screw on
tab to centre of die(TO220AB)
Measured from upper edge of drain
tab to centre of die(SOT404)
Measured from source lead to
source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL
I
DR
I
DRM
V
SD
t
rr
Q
rr
PARAMETER
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
CONDITIONS
MIN.
-
I
F
= 25 A; V
GS
= 0 V
I
F
= 47 A; V
GS
= 0 V
I
F
= 47 A; -dI
F
/dt = 100 A/µs;
V
GS
= -10 V; V
R
= 30 V
-
-
-
-
-
TYP.
-
-
0.85
1.1
66
0.24
MAX.
47
187
1.2
-
-
-
UNIT
A
A
V
V
ns
µC
March 2000
2
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL
W
DSS1
PARAMETER
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 30 A; V
DD
≤
25 V;
V
GS
= 5 V; R
GS
= 50
Ω;
T
mb
= 25 ˚C
MIN.
-
BUK7528-100A
BUK7628-100A
TYP.
-
MAX.
45
UNIT
mJ
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
1000
ID/A
RDS(ON)=VDS/ID
100
tp =
1us
10us
100us
10
1ms
DC
10ms
100ms
0
20
40
60
80
100
Tmb / C
120
140
160
180
1
1
10
VSD/V
100
1000
Fig.1. Normalised power dissipation.
PD% = 100⋅P
D
/P
D 25 ˚C
= f(T
mb
)
Fig.3. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
120
110
100
90
80
70
60
50
40
30
20
10
0
ID%
Normalised Current Derating
Zth/(K/W)
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0
0.001
1E-07
0
20
40
60
80
100
Tmb / C
120
140
160
180
1E-05
t/s
1E-03
1E-01
1E+01
Fig.2. Normalised continuous drain current.
ID% = 100⋅I
D
/I
D 25 ˚C
= f(T
mb
); conditions: V
GS
≥
5 V
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
1
For maximum permissible repetive avalanche current see fig.18.
March 2000
3
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7528-100A
BUK7628-100A
180
ID/A 160
140
120
100
80
10.0
VGS/V =
20.0
13.5
9.0
8.0
7.5
7.0
6.5
6.0
100
ID/A 90
80
70
60
50
40
30
5.5
60
40
20
0
0
2
4
VDS/V
6
8
10
Tj/C= 175 C
25 C
o
o
20
5.0
4.5
10
0
0
2
4
VGS/V
6
8
Fig.5. Typical output characteristics, T
j
= 25 ˚C.
I
D
= f(V
DS
); parameter V
GS
Fig.8. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 25 V; parameter T
j
RDS(ON)/mOhm
45
5.5
6.0
65
60
55
50
45
40
35
30
25
20
15
5
25
gfs/S
40
35
6.5
30
25
7.0
7.5
8.0
10.0
20
15
10
5
0
0
20
40
ID/A
60
80
100
45
65
ID/A
85
105
125
Fig.6. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); paramter V
GS
Fig.9. Typical transconductance, T
j
= 25 ˚C.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
a
31
29
27
25
23
21
19
17
15
RDS(ON) Ohm
2
30V TrenchMOS
1.5
1
0.5
5
7
9
VGS/V
11
13
15
0
-100
-50
0
50
Tj / C
100
150
200
Fig.7. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(V
GS
); conditions: I
D
= 25 A;
Fig.10. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
March 2000
4
Rev 1.000
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7528-100A
BUK7628-100A
5
VGS(TO) / V
max.
BUK759-60
10
VGS / V
9
8
VDS = 14V
4
typ.
3
min.
2
7
VDS = 44V
6
5
4
3
1
2
1
0
-100
0
-50
0
50
Tj / C
100
150
200
0
50
QG / nC
100
150
Fig.11. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.14. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 25 A; parameter V
DS
1E-01
Sub-Threshold Conduction
100
IF/A
90
80
1E-02
2%
typ
98%
70
60
Tj/C= 175 C
25 C
o
o
1E-03
50
40
1E-04
30
20
1E-05
10
0
0.0
0.2
0.4
0.6
0.8
VSDS/V
1.0
1.2
1.4
1E-06
0
1
2
3
4
5
Fig.12. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
Fig.15. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
WDSS%
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
Capacitance / nF
120
110
100
90
80
70
60
Ciss
50
40
30
20
0.0
0.01
Coss
Crss
10
0
20
40
60
80
100
120
Tmb / C
140
160
180
0.1
1
VDS/V
10
100
Fig.13. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
Fig.16. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 75 A
March 2000
5
Rev 1.000
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