a board to be safely inserted and removed from a live
backplane. Using an external N-channel pass transistor,
board supply voltage and inrush current are ramped up at
an adjustable rate. An I
2
C interface and onboard ADC allow
for monitoring of load current, voltage and fault status.
The device features adjustable foldback current limit and
a soft-start pin that sets the dI/dt of the inrush current.
An I
2
C interface may configure the part to latch off or
automatically restart after the LTC4215-1/LTC4215-3
detect a current limit fault.
The controller has additional features to interrupt the host
when a fault has occurred, provide three general purpose
outputs, notify when output power is good, detect insertion
of a load card, and power-up either automatically upon
insertion or wait for an I
2
C command to turn on.
The LTC4215-1 has a 20μs circuit breaker filter for applica-
tions that require a fast fault response time. The LTC4215-3
has an extended 420μs circuit breaker filter for applications
where supply transients may exceed 20μs.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patent 7330065.
Allows Safe Insertion into Live Backplane
8-Bit ADC Monitors Current and Voltage
I
2
C/SMBus Interface
Wide Operating Voltage Range: 2.9V to 15V
dI/dt Controlled Soft-Start
Circuit Breaker Timeout: 20μs (LTC4215-1) or
420μs (LTC4215-3)
Three General Purpose Outputs
High Side Drive for External N-channel MOSFET
No External Gate Capacitor Required
Input Overvoltage/Undervoltage Protection
Optional Latchoff or Auto-Retry After Faults
Alerts Host After Faults
Inrush Current Limit with Foldback
Available in 24-Pin (4mm
×
5mm) QFN
APPLICATIONS
n
n
n
n
Live Board Insertion
Electronic Circuit Breakers
Computers, Servers
Platform Management
TYPICAL APPLICATION
12V Application With 5A Circuit Breaker
0.005Ω
12V
34.8k
CONNECTOR 2
CONNECTOR 1
10Ω
0.1μF
3.57k
1.18k
3.4k
P6KE16A
UV V
DD
SENSE
+
SENSE
–
GATE SOURCE
FB
OV
SDAI
GPIO1
SDAO
LTC4215-1
GPIO2
SCL
GPIO3
ADR0
ADIN
ADR1
INTV
CC
ON TIMER SS
GND
EN
0.1μF
GND
4215 TA01a
Start-Up Waveform
+
C
L
V
OUT
12V
30.1k
FDC653N
V
DD
10V/DIV
INRUSH
CURRENT
2.5A/DIV
V
OUT
10V/DIV
CONTACT
BOUNCE
POWERGOOD
RESET
OK LED
MEASURED
VOLTAGE
SDA
SCL
V
GPIO1
10V/DIV
5k PULL-UP TO V
DD
68nF
C
L
= 12000μF
40ms/DIV
42151 TA01b
BACKPLANE PLUG-IN
CARD
421513fc
1
LTC4215-1/LTC4215-3
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
SOURCE
19 FB
18 GPIO1
17 INTV
CC
25
16 TIMER
15 ADIN
14 GPIO3
13 ADR1
8
SDAI
9 10 11 12
GPIO2
SCL
NC
ADR0
SENSE
+
SENSE
–
GATE
V
DD
UV 1
OV 2
SS 3
GND 4
ON 5
EN
6
SDAO 7
Supply Voltage (V
DD
) ................................ –0.3V to 24V
Supply Voltage (INTV
CC
) .......................... –0.3V to 6.5V
Input Voltages
GATE-SOURCE (Note 3) .......................... –0.3V to 5V
SENSE
+
, SENSE
–
................ V
DD
– 0.3V to V
DD
+ 0.3V
SOURCE.................................................... –5V to 24V
EN,
FB, ON, OV, UV ................................ –0.3V to 12V
ADR0, ADR1, TIMER,
ADIN, SS................................ –0.3V to INTV
CC
+ 0.3V
GPIO2, GPIO3, SCL, SDA, SDAI, SDAO –0.3V to 6.5V
Output Voltages
GATE, GPIO1.......................................... –0.3V to 24V
GPIO2, GPIO3 ....................................... –0.3V to 6.5V
Operating Temperature Range
LTC4215C-1 ............................................. 0°C to 70°C
LTC4215I-1 .......................................... –40°C to 85°C
Storage Temperature Range
QFN.................................................... –65°C to 125°C
24 23 22 21 20
UFD PACKAGE
24-LEAD (4mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W (EXPOSED PAD IS SOLDERED)
EXPOSED PAD (PIN 25) PCB GND CONNECTION OPTIONAL
ORDER INFORMATION
LEAD FREE FINISH
LTC4215CUFD-1#PBF
LTC4215IUFD-1#PBF
LTC4215CUFD-3#PBF
LTC4215IUFD-3#PBF
LEAD BASED FINISH
LTC4215CUFD-1
LTC4215IUFD-1
LTC4215CUFD-3
LTC4215IUFD-3
TAPE AND REEL
LTC4215CUFD-1#TRPBF
LTC4215IUFD-1#TRPBF
LTC4215CUFD-3#TRPBF
LTC4215IUFD-3#TRPBF
TAPE AND REEL
LTC4215CUFD-1#TR
LTC4215IUFD-1#TR
LTC4215CUFD-3#TR
LTC4215IUFD-3#TR
PART MARKING*
42151
42151
42153
42153
PART MARKING*
42151
42151
42153
42153
PACKAGE DESCRIPTION
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
PACKAGE DESCRIPTION
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
24-Lead (4mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
24-Lead (4mm
×
5mm) Plastic QFN
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
SYMBOL
Supplies
V
DD
V
OV(VDD)
I
DD
V
DD(UVL)
Input Supply Range
Input Supply Overvoltage Threshold
Input Supply Current
Input Supply Undervoltage Lockout
V
DD
Rising
l
l
l
l
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
2.9
15
2.75
TYP
MAX
15
UNITS
V
V
mA
V
421513fc
15.6
3
2.84
16.5
5
2.89
2
LTC4215-1/LTC4215-3
ELECTRICAL CHARACTERISTICS
SYMBOL
V
DD(HYST)
INTV
CC
INTV
CC(UVL)
INTV
CC(HYST)
ΔV
SENSE(TH)
ΔV
SENSE
PARAMETER
Input Supply Undervoltage Lockout Hysteresis
Internal Regulator Voltage
INTV
C
Undervoltage Lockout
INTV
C
Undervoltage Lockout Hysteresis
Circuit Breaker Threshold (V
DD
– V
SENSE
)
Current Limit Voltage (V
DD
– V
SENSE
)
V
FB
= 1.3V
V
FB
= 0V
Start-Up Timer Expired
ΔV
SENSE
= 50mV (LTC4215-1)
ΔV
SENSE
= 50mV (LTC4215-3)
V
SENSE
= 12V
V
DD
= 2.9V to 15V
Gate On, V
GATE
= 0V
Gate Off, V
GATE
= 15V
V
DD
≥ 3.3V
INTV
CC
Rising
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
l
l
l
l
l
l
l
l
l
l
l
l
l
l
MIN
75
2.9
2.55
20
22.5
22
6.5
65
15
300
10
4.7
–15
0.8
300
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
TYP
100
3.1
2.64
55
25
25
10
75
20
420
20
5.9
–20
1
450
0.5
MAX
125
3.4
2.79
75
27.5
29
13
90
30
600
35
6.5
–30
1.6
700
1
4.7
1.26
180
±1
1.255
200
±1
1.255
40
±1
1.255
100
±1
0.47
210
1.255
15
±1
1.2
2
2
UNITS
mV
V
V
mV
mV
mV
mV
mV
μs
μs
μA
V
μA
mA
mA
μs
V
V
mV
μA
V
mV
μA
V
mV
μA
V
mV
μA
V
mV
V
mV
μA
V
V
V
421513fc
Current Limit and Circuit Breaker
t
D(OC)
I
SENSE(IN)
Gate Drive
ΔV
GATE
I
GATE(UP)
I
GATE(DN)
I
GATE(DN)
Fast
t
PHL(SENSE)
V
GS(POWERBAD)
V
ON(TH)
ΔV
ON(HYST)
I
ON(IN)
V
EN(TH)
ΔV
EN(HYST)
I
EN
V
OV(TH)
ΔV
OV(HYST)
I
OV(IN)
V
UV(TH)
ΔV
UV(HYST)
I
UV(IN)
V
UV(RTH)
ΔV
UV(RHYST)
V
FB
ΔV
FB(HYST)
I
FB
V
GPIO1(TH)
V
GPIO2(TH)
V
GPIO3(TH)
OC Fault Filter
SENSE± Pin Input Current
External N-channel Gate Drive (V
GATE
– V
SOURCE
)
(Note 3)
External N-channel Gate Pull-Up Current
External N-channel Gate Pull-Down Current
Pull-Down Current from GATE to SOURCE During V
DD
– SENSE = 100mV, V
GS
= 4V
OC/UVLO
(V
DD
– SENSE) High to GATE Low
Gate-Source Voltage for Power Bad Fault
ON Pin Threshold Voltage
ON Pin Hysteresis
ON Pin Input Current
EN
Input Threshold
EN
Hysteresis
EN
Pin Input Current
OV Pin Threshold Voltage
OV Pin Hysteresis
OV Pin Input Current
UV Pin Threshold Voltage
UV Pin Hysteresis
UV Pin Input Current
UV Pin Reset Threshold Voltage
UV Pin Reset Threshold Hysteresis
Foldback Pin Power Good Threshold
FB Pin Power Good Hysteresis
Foldback Pin Input Current
GPIO1 Pin Input Threshold
GPIO2 Pin Input Threshold
GPIO3 Pin Input Threshold
FB = 1.8V
V
GPIO1
Rising
V
GPIO2
Rising
V
GPIO3
Rising
FB Rising
V
UV
= 1.8V
V
UV
Falling
V
OV
= 1.8V
V
UV
Rising
EN
= 3.5V
V
OV
Rising
V
ON
= 1.2V
V
EN
= Rising
V
DD
– SENSE = 100mV, C
GS
= 10nF
V
SOURCE
= 2.9V – 15V
V
ON
Rising
3.8
1.210
60
1.215
50
1.215
10
1.215
60
0.33
60
1.215
3
0.8
1
1
4.3
1.235
128
0
1.235
128
0
1.235
30
0.2
1.235
80
0.2
0.4
125
1.235
8
0.2
1
1.6
1.6
Comparator Inputs
3
LTC4215-1/LTC4215-3
ELECTRICAL CHARACTERISTICS
SYMBOL
V
GPIO1(OL)
V
GPIO2(OL)
V
GPIO3(OL)
I
GPIO1-3(OH)
I
SOURCE
t
P(GATE)
t
D(GATE)
PARAMETER
GPIO1 Pin Output Low Voltage
GPIO2 Output Low Voltage
GPIO3 Output Low Voltage
GPIO1-3 Pin Input Leakage Current
SOURCE Pin Input Current
Input (ON, OV, UV,
EN)
to GATE Off
Propagation Delay
Turn-On Delay
ON
UV, OV,
EN
Overcurrent Auto-Retry
Other Pin Functions
I
GPIO1
= 5mA
I
GPIO2
= 3mA
I
GPIO3
= 1mA
V
GPIO1
= 15V, V
GPIO2-3
= 5V
SOURCE = 15V
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
MIN
TYP
0.25
0.2
0.2
0
40
80
3
1
100
5
0.2
1.235
–100
2
50
–10
–0.7
MAX
0.4
0.4
0.4
±1
120
5
2
150
7.5
0.23
1.26
–120
2.6
60
–12.5
–1.0
μA
μA
Bits
0.5
0.2
0.2
2
1.25
1.25
±2.0
±1.0
±1.0
±5.5
±5.0
±5.0
±5.5
±5.0
±5.0
37.625
15.14
1.205
1
38.45
15.44
1.23
2
0
10
l
UNITS
V
V
V
μA
μA
μs
μs
ms
s
V
V
μA
μA
50
2.5
0.17
1.2
–80
1.4
40
–7.5
–0.4
8
–2
–1.25
–1.25
V
TIMERL(TH)
V
TIMERH(TH)
I
TIMER(UP)
I
TIMER(DOWN)
I
SS
ADC
RES
INL
Timer Low Threshold
Timer High Threshold
TIMER Pin Pull-Up Current
TIMER Pin Pull-Down Current for OC Auto-Retry
Soft-Start Ramp Pull-Up Current
Ramping
Waiting for GATE to Slew
I
TIMER(UP/DOWN)
TIMER Current Up/Down Ratio
Resolution (No Missing Codes)
Integral Nonlinearity
V
DD
– SENSE (Note 5)
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
DD
– SENSE
SOURCE
ADIN
V
ADIN
= 1.28V
V
ADIN
= 1.28V
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
mV
V
V
MΩ
μA
Hz
V
OS
Offset Error (Note 4)
TUE
Total Unadjusted Error
FSE
Full-Scale Error
V
FS
Full-Scale Voltage (255 • V
LSB
)
39.275
15.74
1.255
±0.1
R
ADIN
I
ADIN
I
2
C Interface
V
ADR(H)
I
ADR(IN,Z)
V
ADR(L)
I
ADR(IN)
ADIN Pin Sampling Resistance
ADIN Pin Input Current
Conversion Rate
ADR0, ADR1, Input High Voltage
ADR0, ADR1, Hi-Z Input Current
ADR0, ADR1, Input Low Voltage
ADR0, ADR1, Input Current
INTV
CC
–0.8
3
0.2
–80
INTV
CC
–0.4
INTV
CC
–0.2
–3
V
μA
μA
V
μA
ADR0, ADR1= 0.8V
ADR0, ADR1= INTV
CC
– 0.8V
ADR0, ADR1 = 0V, INTV
CC
l
l
l
l
0.4
0.8
80
421513fc
4
LTC4215-1/LTC4215-3
ELECTRICAL CHARACTERISTICS
SYMBOL
V
SDA,SCL(TH)
I
SDA,SCL(OH)
V
SDA(OL)
f
SCL(MAX)
t
BUF(MIN)
t
HD,STA(MIN)
t
SU,STA(MIN)
t
SU,STO(MIN)
t
HD,DAT(MIN)
t
HD,DATO
t
SU,DAT(MIN)
t
SP
C
X
PARAMETER
SDA, SCL Input Threshold
SDA, SCL Input Current
SDA Output Low Voltage
SCL Clock Frequency
Bus Free Time Between Stop/Start Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time (Input)
Data Hold Time (Output)
Data Set-Up Time
Suppressed Spike Pulse Width
SCL, SDA Input Capacitance
SDAI Tied to SDAO (Note 6)
SCL, SDA = 5V
I
SDA
= 3mA
Operates with f
SCL
≤ f
SCL(MAX)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
CONDITIONS
l
l
l
l
l
l
l
l
l
l
l
l
l
MIN
1.3
TYP
1.7
0.2
MAX
1.9
±1
0.4
UNITS
V
μA
V
kHz
I
2
C Interface Timing
400
1000
0.12
30
30
140
30
300
50
500
30
110
1.3
600
600
600
100
900
600
250
10
μs
ns
ns
ns
ns
ns
ns
ns
pF
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive; all voltages are referenced to
GND unless otherwise specified.
Note 3:
An internal clamp limits the GATE pin to a minimum of 5V above
SOURCE. Driving this pin to voltages beyond the clamp may damage the
device.
Note 4:
Offset error is the offset voltage measured from 1LSB when the
output code flickers between 0000 0000 and 0000 0001.
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
precise analog input voltage. Maximum specifications are limited by the
LSB step size and the single shot measurement. Typical specifications are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
京公网安备 11010802033920号
EEWORLD
