UDA1384
Multichannel audio coder-decoder
Rev. 02 — 17 January 2005
Product data sheet
1. General description
The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters (ADC)
and 6 Digital-to-Analog Converters (DAC) with signal processing features employing
bitstream conversion techniques. The multichannel configuration makes the device
eminently suitable for use in digital audio equipment which incorporates surround feature.
The UDA1384 supports conventional 2 channels per line data transfer conformable to the
I
2
S-bus format with word lengths of up to 24 bits, the MSB-justified format with word
lengths of up to 24 bits and the LSB-justified format with word lengths of 16 bits, 20 bits
and 24 bits, as well as 4 channels to 6 channels per line transfer mode. The device also
supports a combination of the MSB-justified output format and the LSB-justified input
format. The UDA1384 has special sound processing features in the Direct Stream Digital
(DSD) playback mode, de-emphasis, volume and mute which can be controlled via the
L3-bus or I
2
C-bus interface.
2. Features
2.1 General
s
s
s
s
s
2.7 V to 3.6 V power supply
5 V tolerant digital inputs
24-bit data path
Selectable control: via L3-bus or I
2
C-bus microcontroller interface
Supports sample frequency ranges for:
x
Audio ADC: f
s
= 16 kHz to 100 kHz
x
Voice ADC: f
s
= 7 kHz to 50 kHz
x
Audio DAC: f
s
= 16 kHz to 200 kHz
Separate power control for ADC and DAC
ADC plus integrated high-pass filter to cancel DC offset
Integrated digital filter plus DAC
Slave mode only applications
Easy application
s
s
s
s
s
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
2.2 Multiple format data interface
s
Audio interface supports standard I
2
S-bus, MSB-justified, LSB-justified and two
multichannel formats
s
Voice interface supports I
2
S-bus and mono channel formats
2.3 Digital sound processing
s
Control via L3-bus or I
2
C-bus:
x
Channel independent digital logarithmic volume
x
Digital de-emphasis for f
s
= 32 kHz, 44.1 kHz, 48 kHz or 96 kHz
x
Soft or quick mute
x
Output signal polarity control
2.4 Advanced audio configuration
s
Inputs:
x
4 single-ended audio inputs (2
×
stereo) with programmable gain amplifiers
x
1 single-ended voice input
s
Outputs:
x
6 differential audio outputs (3
×
stereo)
s
DSD mode to support stereo DSD playback
s
High linearity, wide dynamic range and low distortion
s
DAC digital filter with selectable sharp or soft roll-off
3. Applications
s
Excellently suitable for multichannel home audio-video application
4. Quick reference data
Table 1:
Quick reference data
V
DDD
= V
DDA(AD)
= V
DDA(DA)
= 3.3 V; T
amb
= 25
°
C; R
L
= 22 k
Ω
; all voltages referenced to ground
(pins V
SS
); unless otherwise specified.
Symbol
Supplies
V
DDA(AD)
V
DDA(DA)
V
DDD
I
DDA(AD)
I
DDA(DA)
I
DDD
ADC analog supply
voltage
DAC analog supply
voltage
digital supply voltage
ADC analog supply
current
DAC analog supply
current
f
ADC
= 48 kHz
f
DAC
= 48 kHz
2.7
2.7
2.7
-
-
-
3.3
3.3
3.3
30
20
31
3.6
3.6
3.6
-
-
-
V
V
V
mA
mA
mA
Parameter
Conditions
Min
Typ
Max
Unit
digital supply current f
ADC
= f
DAC
= 48 kHz;
f
VOICE
= 48 kHz
9397 750 14366
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
2 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
Table 1:
Quick reference data
…continued
V
DDD
= V
DDA(AD)
= V
DDA(DA)
= 3.3 V; T
amb
= 25
°
C; R
L
= 22 k
Ω
; all voltages referenced to ground
(pins V
SS
); unless otherwise specified.
Symbol
I
DDD(pd)
Parameter
Conditions
Min
-
-
−20
at 0 dB setting;
900 mV input
at
−1
dBFS
at
−60
dBFS;
A-weighted
code = 0; A-weighted
[1] [2]
Typ
18
14
-
−1.2
−88
−37
98
100
Max
-
-
+85
−0.7
−82
−30
-
-
Unit
mA
mA
°C
dB
dB
dB
dB
dB
digital supply current audio and voice
in Power-down mode ADCs power-down
DAC power-down
ambient temperature
digital output level
total harmonic
distortion-plus-noise
to signal ratio
signal-to-noise ratio
channel separation
T
amb
D
0
(THD+N)/S
Audio analog-to-digital converter
−2.5
-
-
89
-
S/N
α
cs
Digital-to-analog converter
Differential mode
V
o(rms)
(THD+N)/S
output voltage
(RMS value)
total harmonic
distortion-plus-noise
to signal ratio
signal-to-noise ratio
channel separation
output voltage
(RMS value)
total harmonic
distortion-plus-noise
to signal ratio
signal-to-noise ratio
channel separation
at 0 dBFS digital
input
at 0 dBFS
at
−60
dBFS;
A-weighted
code = 0; A-weighted
at 0 dBFS digital
input
at 0 dBFS
at
−60
dBFS;
A-weighted
code = 0; A-weighted
1.9
-
-
100
-
-
-
-
-
-
2.0
−98
−50
110
114
1.0
−88
−45
105
110
2.1
−89
−45
-
-
-
-
-
-
-
V
dB
dB
dB
dB
V
dB
dB
dB
dB
S/N
α
cs
V
o(rms)
(THD+N)/S
Single-ended mode
S/N
α
cs
[1]
[2]
The input voltage can be up to 2 V (RMS) when the current through the ADC input pin is limited to
approximately 1 mA by using a series resistor.
The input voltage to the ADC scales proportionally with the power supply voltage.
5. Ordering information
Table 2:
Ordering information
Package
Name
UDA1384H
QFP44
Description
plastic quad flat package; 44 leads (lead length
1.3 mm); body 10
×
10
×
1.75 mm
Version
SOT307-2
Type number
9397 750 14366
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
3 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
6. Block diagram
V
DDA(AD)
5
VINL1
2
PGA
ADC 1L
V
SSA(AD)
3
V
ADCP
9
ADC 1R
V
ADCN
7
PGA
V
ref
1
4
VINR1
VINL2
6
PGA
10
LNA
ADC 2L
ADC 2R
PGA
8
VINR2
VVOICE
DECIMATION FILTER
ADC
DC-CANCELLATION FILTER
TEST
11
TEST
DECIMATION
FILTER
HP FILTER
DATAV
BCKV
WSV
PLL
21
MCCLK
MCMODE
MCDATA
I2C_L3
20
22
30
L3-BUS OR
I
2
C-BUS
CONTROL
INTERFACE
16
17
18
I
2
S-BUS
INTERFACE 3
CLOCK
19
SYSCLK
13
I
2
S-BUS
INTERFACE 1
12
14
15
DATAAD1
DATAAD2
BCKAD
WSAD
PLL
23
I
2
S-BUS
INTERFACE 2
24
25
26
27
WSDA
BCKDA
DATADA1
DATADA2
DATADA3
VOLUME, MUTE, DE-EMPHASIS
29
28
NOISE SHAPER
V
DDD
V
SSD
INTERPOLATION FILTER
UDA1384
VOUT1N
VOUT1P
VOUT3N
VOUT3P
VOUT5N
VOUT5P
32
31
36
35
42
41
−
+
−
+
−
+
37
V
DDA(DA)
DAC 5
40
V
SSA(DA)
DAC 6
DAC 3
DAC 4
DAC 1
DAC 2
−
+
−
+
−
+
34
33
39
38
44
43
VOUT2N
VOUT2P
VOUT4N
VOUT4P
VOUT6N
VOUT6P
mce639
Fig 1. Block diagram
9397 750 14366
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
4 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
7. Pinning information
7.1 Pinning
37 V
DDA(DA)
40 V
SSA(DA)
39 VOUT4N
42 VOUT5N
36 VOUT3N
34 VOUT2N
33 VOUT2P
32 VOUT1N
31 VOUT1P
30 I2C_L3
29 V
DDD
28 V
SSD
27 DATADA3
26 DATADA2
25 DATADA1
24 BCKDA
23 WSDA
DATAAD2 12
DATAAD1 13
BCKAD 14
WSAD 15
DATAV 16
BCKV 17
WSV 18
SYSCLK 19
MCMODE 20
MCCLK 21
MCDATA 22
001aac311
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
44 VOUT6N
41 VOUT5P
38 VOUT4P
V
ref
VINL1
V
SSA(AD)
VINR1
V
DDA(AD)
VINL2
V
ADCN
VINR2
V
ADCP
1
2
3
4
5
6
7
8
9
UDA1384H
VVOICE 10
TEST 11
Fig 2. Pin configuration
7.2 Pin description
Table 3:
Symbol
V
ref
VINL1
V
SSA(AD)
VINR1
V
DDA(AD)
VINL2
V
ADCN
VINR2
V
ADCP
VVOICE
TEST
DATAAD2
DATAAD1
BCKAD
WSAD
9397 750 14366
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Type
AIO
AIO
AGND
AIO
AS
AIO
AIO
AIO
AIO
AIO
DID
DO
DO
DIS
DI
Description
ADC reference voltage
ADC 1 input left
ADC analog ground
ADC 1 input right
ADC analog supply voltage
ADC 2 input left
ADC reference voltage N
ADC 2 input right
ADC reference voltage P
voice ADC input
test input; must be connected to digital ground (V
SSD
) in
application
ADC 2 data output
ADC 1 data output
ADC bit clock input
ADC word select input
Product data sheet
Rev. 02 — 17 January 2005
35 VOUT3P
43 VOUT6P
5 of 55
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