1.5 GHz Low Noise Silicon
MMIC Amplifier
Technical Data
INA-52063
Features
• Ultra-Miniature Package
• Single 5 V Supply (30 mA)
• 22 dB Gain
• 8 dBm P
1dB
• Unconditionally Stable
Surface Mount SOT-363
(SC-70) Package
Description
Hewlett-Packard’s INA-52063 is a
Silicon monolithic amplifier that
offers excellent gain and power
output for applications to
1.5 GHz. Packaged in an ultra-
miniature SOT-363 package, it
requires half the board space of a
SOT-143 package.
The INA-52063 is fabricated using
HP’s 30 GHz f
MAX
ISOSAT
TM
Silicon bipolar process which
uses nitride self-alignment sub-
micrometer lithography, trench
isolation, ion implantation, gold
metallization, and polyimide
intermetal dielectric and scratch
protection to achieve superior
performance, uniformity, and
reliability.
Applications
• Amplifier for Cellular,
Cordless, Special Mobile
Radio, PCS, ISM, Wireless
LAN, DBS, TVRO, and TV
Tuner Applications
Pin Connections and
Package Marking
GND 2
OUTPUT
6 and V
CC
5 GND 3
4 V
CC
52
GND 1
INPUT 3
Note:
Package marking provides
orientation and identification.
Equivalent Circuit
(Simplified)
V
CC
RF
OUTPUT
& V
CC
RF
INPUT
GROUND 1
GROUND 2
GROUND 3
5965-9681E
6-156
INA-52063 Typical Scattering Parameters
[3]
,
T
C
= 25°C, Z
O
= 50
Ω,
V
CC
= 5.0 V
Freq.
GHz
0.05
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.20
1.40
1.60
1.80
2.00
2.20
2.40
2.60
2.80
3.00
S
11
Mag
0.06
0.06
0.06
0.07
0.07
0.09
0.10
0.12
0.13
0.15
0.17
0.21
0.24
0.27
0.30
0.32
0.33
0.35
0.36
0.36
0.36
Ang
165
154
131
104
80
66
46
30
14
0
-12
-33
-50
-66
-80
-93
-105
-117
-128
-139
-149
dB
23.5
23.4
23.4
23.3
23.1
23.0
22.8
22.6
22.3
22.0
21.7
21.0
20.2
19.4
18.6
17.8
17.1
16.3
15.5
14.8
14.1
S
21
Mag
14.88
14.84
14.72
14.57
14.33
14.08
13.76
13.41
13.01
12.59
12.14
11.22
10.28
9.38
8.55
7.80
7.13
6.52
5.98
5.52
5.08
Ang
-5
-9
-19
-28
-37
-46
-55
-64
-73
-82
-90
-106
-122
-137
-151
-164
-177
170
159
147
136
dB
-29.3
-29.3
-29.4
-29.5
-29.4
-29.4
-29.4
-29.3
-29.2
-29.0
-28.8
-28.4
-28.1
-27.7
-27.5
-27.4
-27.6
-27.8
-28.1
-28.9
-29.5
S
12
Mag
0.034
0.034
0.034
0.034
0.034
0.034
0.034
0.034
0.035
0.036
0.036
0.038
0.040
0.041
0.042
0.043
0.042
0.041
0.039
0.036
0.033
S
22
Ang
0
0
0
1
2
3
4
5
6
6
7
7
6
4
2
-1
-5
-8
-12
-15
-16
Mag
0.05
0.05
0.05
0.06
0.07
0.08
0.09
0.11
0.13
0.14
0.16
0.20
0.23
0.25
0.27
0.29
0.30
0.31
0.32
0.33
0.33
Ang
1
0
-1
-5
-10
-14
-21
-29
-37
-45
-52
-67
-81
-94
-107
-118
-129
-139
-149
-158
-168
K
Factor
1.24
1.24
1.25
1.25
1.26
1.27
1.28
1.29
1.28
1.27
1.28
1.25
1.24
1.26
1.29
1.33
1.44
1.56
1.74
2.01
2.37
Note:
3. Reference plane per Figure 9 in Applications Information section.
INA-52063 Applications
Information
Introduction
The INA-52063 is a silicon RFIC
amplifier that is designed with an
internal resistive feedback net-
work to provide a 50
Ω
input and
50
Ω
output impedance. With a
Third Order Intercept Point of
+20 dBm and a low Noise Figure
of 4 dB, the INA-52063 is
especially useful for RF and IF
amplifier applications requiring
high dynamic ranges.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters for this device are
shown in Figure 9. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
SOT-363 PCB Layout
The INA-52063 is packaged in the
miniature SOT-363 (SC-70)
surface mount package. A PCB
pad layout for the SOT-363
package is shown in Figure 10
(dimensions are in inches). This
layout provides ample allowance
for package placement by
automated assembly equipment
without adding pad parasitics that
could impair the high frequency
performance of the INA-52063.
The layout is shown with a
nominal SOT-363 package
footprint superimposed on the
PCB pads for reference.
0.026
REFERENCE
PLANES
0.035
0.07
TEST CIRCUIT
0.016
Figure 9. Phase Reference Planes.
Figure 10. PCB Pad Layout
(dimensions in inches).
6-159
Operating Details
The INA-52063 is a voltage biased
device that operates from a
+5 volt power supply with a
typical current drain of 30 mA.
All bias regulation circuitry is
integrated into the RFIC.
Figure 11 shows a typical imple-
mentation of the INA-52063. The
supply voltage for the INA-52063
must be applied to two terminals,
the V
CC
pin and the RF Output pin.
The V
CC
connection to the ampli-
fier is RF bypassed by placing a
capacitor to ground near the V
CC
pin of the amplifier package.
The power supply connection to
the RF Output pin is achieved by
means of a RF choke (inductor).
The value of the RF choke must
be large relative to 50
Ω
in order
to prevent loading of the RF
Output.
The supply voltage end of the RF
choke is bypassed to ground with
a capacitor. If the physical layout
permits, this can be the same
bypass capacitor that is used at
the V
CC
terminal of the amplifier.
Blocking capacitors are normally
placed in series with the RF Input
and the RF Output to isolate the
DC voltages on these pins from
circuits adjacent to the amplifier.
The values for the blocking and
bypass capacitors are selected to
provide a reactance at the lowest
frequency of operation that is
small relative to 50
Ω.
RF Layout
An example layout for an
amplifier using the INA-52063 is
shown in Figure 12.
This example uses a microstrip-
line design (solid groundplane on
the back side of the circuit board).
The circuit board material is
0.031-inch thick FR-4. Plated
through holes (vias) are used to
bring the ground to the top side
of the circuit where needed.
Multiple vias are used to reduce
the inductance of the path to
ground.
Figure 13 shows an assembled
amplifier. The +5 volt supply is
fed directly into the V
CC
pin of
the INA-52063 and into the RF
Output pin through the RF choke
(RFC). Capacitor C3 provides RF
bypassing for both the V
CC
pin
and the power supply end of the
RFC.
Capacitor C4 is optional and may
be used to add additional bypass-
ing for the V
CC
line. A well
bypassed V
CC
line is especially
necessary in cascades of ampli-
fier stages to prevent oscillation
that may occur as a result of RF
feedback through the power
supply lines.
For this demonstration circuit,
the value chosen for the RF
choke was 220 nH (Coilcraft
1008CS-221 or equivalent). All of
the blocking and bypass capac-
itors are 1000 pF. These values
provide excellent amplifier
performance from under 50 MHz
through 1 GHz. Larger values for
the choke and capacitors can be
used to extend the lower end of
the bandwidth. Since the gain of
the INA-52063 extends down to
DC, the frequency response of the
amplifier is limited only by the
values of the capacitors and
choke.
A convenient method for making
RF connection to the demonstra-
tion board is to use a PCB
mounting type of SMA connector
(Johanson 142-0701-881, or
equivalent). These connectors
can be slipped over the edge of
the PCB and the center conduc-
tors soldered to the input and
output lines. The ground pins of
the connectors are soldered to
the ground plane on the backside
of the board. The extra ground
pins for the top of the board are
not needed and are clipped off.
PCB Materials
Typical choices for PCB material
for low cost wireless applications
are FR-4 or G-10 with a thickness
of 0.025 or 0.031 inches. A thick-
ness of 0.062 inches is the maxi-
mum that is recommended for
use with this particular device.
The use of a thicker board mate-
rial increases the inductance of
the plated through vias used for
RF grounding and may deterior-
ate circuit performance. Adequate
grounding is needed not only to
obtain maximum amplifier
performance but also to reduce
any possibility of instability.
H
INA-5XX63 DEMO BOARD
05/95
C
block
RF
OUTPUT
INPUT
OUTPUT
52
RFC
V
CC
C
bypass
V
CC
RF
INPUT
C
block
Figure 11. Basic Amplifier
Application.
Figure 12. RF Layout.
6-160
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