3.0 GHz Low Noise Silicon MMIC
Amplifier
Technical Data
INA-54063
Features
• Ultra-Miniature Package
• Single 5 V Supply (29 mA)
• 21.5 dB Gain (1.9 GHz)
• 8.0 dBm P
1dB
(1.9 GHz)
• Positive Gain Slope
• Unconditionally Stable
Surface Mount Package
SOT-363 (SC-70)
Description
Hewlett-Packard’s INA-54063 is a
Silicon monolithic amplifier that
offers excellent gain and power
output for applications to
3.0 GHz. Packaged in an ultra-
miniature SOT-363 package, it
requires half the board space of a
SOT-143 package.
With its wide bandwidth and high
linearity, the INA-54063 is an
excellent candidate for DBS IF
applications. It also features a
unique gain curve which in-
creases over the range from 1 to
2 GHz. This gain slope compen-
sates for the gain rolloff found in
typical receiver systems.
The INA-54063 is fabricated using
HP’s 30 GHz f
MAX
ISOSAT™
Silicon bipolar process which
uses nitride self-alignment
submicrometer lithography,
trench isolation, ion implantation,
gold metalization, and polyimide
intermetal dielectric and scratch
protection to achieve superior
performance, uniformity, and
reliability.
Applications
• IF Amplifier for DBS
Downconverter, Cellular,
Cordless, Special Mobile
Radio, PCS, ISM, and
Wireless LAN Applications
Pin Connections and
Package Marking
GND 1
OUTPUT
6 and V
d
5 GND
4 V
CC
54
GND 2
INPUT 3
Equivalent Circuit
(Simplified)
Note:
Package marking provides orientation
and identification.
V
d
RF
INPUT
RF
OUTPUT
and V
d
GROUND
6-163
5965-5364E
INA-54063 Typical Performance
T
C
= 25°C, Z
O
= 50
Ω,
V
d
= 5 V, unless noted
25
8
16
6
P
1 dB
(dBm)
20
GAIN (dB)
5V
NOISE FIGURE (dB)
6V
7
4V
6V
5V
12
6V
5V
8
5
15
4V
4V
4
4
10
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
3
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
Figure 1. Gain vs. Frequency and
Voltage.
Figure 2. Noise Figure vs. Frequency
and Voltage.
Figure 3. Output Power for 1 dB Gain
Compression vs. Frequency and
Voltage.
14
12
10
P
1 dB
(dBm)
8
6
T
A
= +85°C
4 T
A
= +25°C
T
A
= –40°C
2
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
22
20
18
GAIN (dB)
16
T
A
= +85°C
T
A
= +25°C
14
T
A
= –40°C
12
10
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
NOISE FIGURE (dB)
7.5
T
A
= +85°C
7
T
A
= +25°C
6.5 T
A
= –40°C
6
5.5
5
4.5
4
3.5
3
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and
Temperature.
Figure 5. Noise Figure vs. Frequency
and Temperature.
Figure 6. Output Power for P
1dB
Gain
Compression vs. Frequency and
Temperature.
3
2.5
VSWR out
2
I
d
(mA)
VSWR in
VSWR
1.5
1
0.5
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
FREQUENCY (GHz)
45
T
A
= +85°C
T
A
= +25°C
35 T
A
= –40°C
40
30
25
20
15
10
5
0
0
1
2
3
4
5
6
7
V
d
(V)
Figure 7. Input and Output VSWR vs.
Frequency.
Figure 8. Supply Current vs. Voltage
and Temperature.
6-165
INA-54063 Applications
Information
Introduction
The INA-54063 is a silicon RFIC
amplifier that is designed with an
internal resistive feedback
network to provide a 50
Ω
input
and near 75
Ω
output impedance.
With a 1-dB compressed Output
Power of 8 dBm and Noise Figure
of 5 dB, the INA-54063 is well
suited for amplifier applications
requiring high dynamic ranges.
A unique feature of the INA-54063
is a positive gain slope over the
1–2 GHz range that is useful in
many satellite-based TV and
datacom systems. When used for
the IF amplifier, the up-slope in
the gain of the INA-54063 is
intended to compensate for the
negative gain slope in many Low
Noise Block downconverters
(LNB) used in consumer and
commercial TV delivery systems,
such as DDS, DBS, and TVRO.
The positive gain slope can also
compensate for the high fre-
quency attenuation characteris-
tics of 75
Ω
cables used to
connect the outdoor LNBs to
indoor set-top converters.
In addition to use in TV delivery
systems, the INA-54063 will find
many applications in 50
Ω
input-
50
Ω
output gain and buffer
stages in wireless communica-
tions systems.
typical current drain of 29 mA. All
bias regulation circuitry is
integrated into the RFIC.
Figure 9 shows a typical imple-
mentation of the INA-54063. The
supply voltage for the INA-54063
must be applied to two terminals,
the V
cc
pin and the RF Output pin.
C
block
RF
OUTPUT
Example Layout for 50
Ω
Amplifier
An example layout for an ampli-
fier using the INA-54063 with
50
Ω
input and 50
Ω
output is
shown in Figure 10.
H
05/95
INA-5XX63 DEMO BOARD
INPUT
OUTPUT
54
RF
INPUT
C
block
C
bypass
RFC
V
d
Figure 9. Basic Amplifier
Application.
The V
d
connection to the ampli-
fier is RF bypassed by placing a
capacitor to ground near the V
d
pin of the amplifier package.
The power supply connection to
the RF Output pin is achieved by
means of an RF choke (inductor).
The value of the RF choke must
be large relative to 50/75
Ω
in
order to prevent loading of the RF
Output.
The supply voltage end of the RF
choke is bypassed to ground with
a capacitor. If the physical layout
permits, this can be the same
bypass capacitor that is used at
the V
d
terminal of the amplifier.
Blocking capacitors are normally
placed in series with the RF Input
and the RF Output to isolate the
DC voltages on these pins from
circuits adjacent to the amplifier.
The values for the blocking and
bypass capacitors are selected to
provide a reactance at the lowest
frequency of operation that is
small relative to 50
Ω.
Vcc
Figure 10. RF Layout for 50
Ω
Input
and Output.
This example uses a
microstripline design (solid
groundplane on the back side of
the circuit board). The circuit
board material is 0.031-inch thick
FR-4. Plated through holes (vias)
are used to bring the ground to
the top side of the circuit where
needed. Multiple vias are used to
reduce the inductance of the path
to ground.
Figure 11 shows an assembled
amplifier. The +5 volt supply
(V
cc
) is fed directly into the V
d
pin of the INA-54063 and into the
RF Output pin through the RF
choke (RFC). Capacitor C3
provides RF bypassing for both
the V
d
pin and the power supply
end of the RFC.
Operating Details
The INA-54063 is a voltage biased
device that operates from a
+5 volt power supply with a
6-167
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
