LAB
TOP VIEW
COMP
1
V
FB
2
I
SENSE
3
R
T
/C
T
4
8
7
6
5
SEME
IP1844A SERIES
IP1845A SERIES
V
REF
V
CC
OUTPUT
GROUND
CURRENT MODE
REGULATING
PULSE WIDTH
MODULATORS
FEATURES
•
•
•
•
•
•
Guaranteed ±1% reference voltage tolerance
Accurate oscillator discharge current
Guaranteed ±10% frequency tolerance
Low start–up current (<500
m
A)
Under voltage lockout with hysteresis
Output state completely defined for all supply
and input conditions
• Interchangeable with IP and UC1844/5 series for
improved operation
• 500kHz Oscillator operation
250kHz Output operation
J Package – 8 Pin Ceramic DIP
N Package – 8 Pin Plastic DIP
D-8 Package – 8 Pin Plastic (150) SOIC
TOP VIEW
COMP
1
N/C
2
14
13
12
11
10
9
8
V
REF
N/C
V
CC
V
C
OUTPUT
GROUND
POWER
GROUND
V
FB
3
N/C
4
I
SENSE
5
N/C
6
R
T
/C
T
7
D-14 Package – 14 Pin Plastic (150) SOIC
Part
Number
IP1844A
IP2844A
IP3844A
IP1845A
IP2845A
IP3845A
J–Pack
8 Pin
N–Pack
8 Pin
D–8
8 Pin
D–14
14 Pin
Order Information
Temp.
Range
-55 to +125°C
-25 to +85°C
0 to +70°C
-55 to +125°C
-25 to +85°C
0 to +70°C
Note:
To order, add the package identifier to the
part number.
eg.
IP1844AD–14
IP3845AJ
ABSOLUTE MAXIMUM RATINGS
(T
case
= 25°C unless otherwise stated)
V
CC
I
O
Supply Voltage
Output Current
Output Energy
Analog Inputs
Error Amp Output Sink Current
Power Dissipation
Derate @ T
amb
> 50°C
Power Dissipation
Derate @ T
amb
> 50°C
Power Dissipation
Derate @ T
case
> 25°C
Storage Temperature Range
Lead Temperature
(low impedance source)
(I
CC
< 30mA)
(capacitive load)
(pins 2 and 3)
T
amb
= 25°C
T
case
= 25°C
T
case
= 25°C
J, N Packages
D Package
J, N Packages
+30V
Self limiting
±1A
5µJ
–0.3V to +V
CC
10mA
1W
10mW/°C
725mW
7.25mW/°C
2W
16mW/°C
–65 to 150°C
+300°C
Prelim. 2/95
P
D
P
D
P
D
T
STG
T
L
(soldering, 10 seconds)
Semelab plc.
Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
LAB
DESCRIPTION
SEME
IP1844A SERIES
IP1845A SERIES
The IP1844A/IP1845A series of switching regulator control circuits contain all the functions necessary to
implement off-line, current mode switching regulators, using a minimum number of external parts. Functions
included are voltage reference, error amplifier, current sense comparator, oscillator, totem-pole output driver and
under-voltage lockout circuitry.
In addition the IP1844A and IP1845A series of devices have a toggle flip-flop which blanks the output on every
second clock pulse, thereby ensuring that the duty cycle never exceeds 50%. For applications requiring more
flexible control, all devices feature an on-chip trimmed oscillator discharge current, allowing accurate control to
maximum-duty-cycle by selection of timing components. This can be beneficial even when using the IP1844A or
IP1845A series, as it allows optimum safety margins to be designed into the application.
Although pin compatible with the standard IP1844/5 parts these devices offer improved performance in several
areas. They also offer tighter specification and improved performance over the IP and UC1844/5 series, whilst
retaining complete compatibility.
BLOCK DIAGRAM
V
CC
7/12
34V
G
ND
5/9
UNDER–VOLTAGE
LOCKOUT
ENABLE
REFERENCE 5V
REGULATOR
INTERNAL
BIAS
2.5V
REG
8/14
V
REF
16V
(8.4V)
6V
(0.5V)
S
R
3.6V
R
T
/C
T
4/7
V
REF
STATUS
LATCH
7/11
V
C
OSCILLATOR
Q
T
ERROR
AMP
S
R
R
1V
CURRENT
SENSE
COMPARATOR
PWM
LATCH
TOGGLE
FLIP
FLOP *
6/10
OUTPUT
5/8
POW ER
GROUND
2R
V
FB
C
OMP
I
SENSE
2/3
1/1
* 1844A and 1845A series only.
Values in brackets are for IP1845 series.
PIN NUMBERS
1st Number – N, J and 8 Pin D Packages
2nd Num ber – 14 Pin D Package.
3/5
RECOMMENDED OPERATING CONDITIONS
V
CC
I
O
Supply Voltage
1
Output Current
Analog Inputs
(pins 2 and 3)
IP1844A , IP1845A
IP2844A , IP2845A
IP3844A , IP3845A
Error Amp Output Sink Current
Operating Ambient Temperature Range
≤
30V
0 to ±200mA
–0.3V to 3V
0 to 2mA
–55 to 125°C
–25 to 85°C
0 to 70°C
Notes:
1.
Lower limit set by under voltage lockout specification.
Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
Semelab plc.
LAB
Parameter
Output Voltage
Input Regulation
Output Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
Current
Frequency
Voltage Stability
Temperature Stability
Amplitude
Discharge Current
Line, Load, Temp
f = 10Hz to 10kHz
T
J
= 25°C
T
J
= 125°C @ 1000Hrs
V
REF
= 0
SEME
IP1844A SERIES
IP1845A SERIES
ELECTRICAL CHARACTERISTICS
(Over Full Operating Temperature Range unless otherwise stated)
Test Conditions
1
REFERENCE SECTION
I
O
= 1mA
V
CC
= 12V to 25V
I
O
= 1mA to 20mA
T
J
= 25°C
IP1844A , IP1845A
IP2844A , IP2845A
Min.
Typ.
Max.
4.95
5.00
6
6
0.2
4.90
50
5
30
80
25
160
5.05
20
25
0.4
5.10
Min.
4.90
IP3844A
IP3845A
Typ.
5.00
6
6
0.2
Max. Units
5.10
20
25
0.4
5.18
V
mV
mV
°C
V
µV
25
160
mV
mA
4.82
50
5
30
80
OSCILLATOR SECTION
T
J
= 25°C
V
CC
= 12V to 25V
∆T
A
= Min to Max
V
PIN4
Peak to Peak
T
J
= 25°C
∆T
A
= Min to Max
(Note 2)
47
52
0.2
5
1.7
57
1
47
52
0.2
5
1.7
57
1
kHz
%
%
V
7.8
7
2.45
8.3
8.8
9
7.8
7
2.42
8.3
8.8
9
mA
ERROR AMP SECTION
Input Voltage
Input Bias Current
Open Loop Voltage
Gain
Unity Gain Bandwidth
Supply Voltage
Rejection
Output Sink Current
Output Source Current
V
OUT
High
V
OUT
Low
V
CC
= 12V to 25V
V
PIN2
= 2.7V
V
PIN2
= 2.3V
V
PIN2
= 2.3V
V
PIN2
= 2.7V
V
PIN1
= 1.1V
V
PIN1
= 5V
R
L
= 15kΩ
R
L
= 15kΩ
V
O
= 2V to 4V
V
PIN1
= 2.5V
2.50
–0.3
2.55
–1
2.50
–0.3
2.58
–2
V
µA
dB
MHz
dB
mA
V
65
0.7
60
2
–0.5
5
90
1
70
6
–0.8
6
0.7
1.1
65
0.7
60
2
–0.5
5
90
1
70
6
–0.8
6
0.7
1.1
NOTES
1. Test Conditions unless otherwise stated:
V
CC
= 15V* , R
T
= 10kΩ , C
T
= 3.3nF , f = 52kHz.
*Adjust V
CC
above start threshold before setting at required level.
2. Output frequency is half the oscillator frequency.
All specifications apply over the full operating temperature range unless otherwise stated.
(See Ordering Information for further details).
Semelab plc.
Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
LAB
Parameter
Gain
Maximum Input Signal
Supply Voltage
Rejection
Input Bias Current
Delay to Output
SEME
IP1844A SERIES
IP1845A SERIES
ELECTRICAL CHARACTERISTICS
(Over Full Operating Temperature Range unless otherwise stated)
Test Conditions
1
CURRENT SENSE SECTION
See Notes 2,3
V
PIN1
= 5V
V
C
= 12V to 25V
(Note 2)
IP1844A , IP1845A
IP2844A , IP2845A
Min.
Typ.
Max.
2.85
0.9
60
3
1
70
–2
150
–10
300
0.4
2.2
3.15
1.1
Min.
2.85
0.9
60
IP3844A
IP3845A
Typ.
3
1
70
–2
150
0.1
1.5
Max. Units
3.15
1.1
V/V
V
dB
–10
300
0.4
2.2
µA
ns
OUTPUT SECTION
Output Low Level
Output High Level
Rise Time
Fall Time
UVLO Saturation
Upper Threshold
(V
CC
)
Lower Threshold
(V
CC
)
Start–up Current
Operating Supply
Current
V
CC
Zener Voltage
Maximum Duty Cycle
Minimum Duty Cycle
V
PIN2
= 0V
V
PIN3
= 0V
I
CC
= 25mA
IP1844A Series
IP1845A Series
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
C
L
= 1nF
C
L
= 1nF
V
CC
= 6V
IP1844A Series
IP1845A Series
IP1844A Series
IP1845A Series
I
L
= 1mA
0.1
1.5
13
12
13.5
13.5
50
50
0.7
15
7.8
9
7
16
8.4
10
7.6
0.3
11
14
30
47
34
48
V
V
13
12
150
150
1.1
17
9
11
8.2
0.5
15
17
40
50
0
30
46
14.5
7.8
8.5
7
13.5
13.5
50
50
0.7
16
8.4
10
7.6
0.3
11
14
34
48
150
150
1.1
17.5
9
11.5
8.2
0.5
15
17
40
50
0
ns
V
UNDER–VOLTAGE LOCKOUT SECTION
V
V
TOTAL STANDBY CURRENT
mA
mA
V
PWM SECTION
%
NOTES
1. Test Conditions unless otherwise stated:
V
CC
= 15V* , R
T
= 10kΩ , C
T
= 3.3nF , f = 52kHz.
*Adjust V
CC
above start threshold before setting at
required level.
All specifications apply over the full operating temperature
range unless otherwise stated.
(See Ordering Information for further details).
2. Parameter measured at trip point of latch with
V
PIN2
= 0V
3. Gain defined as:
∆V
PIN1
∆V
PIN3
0
≤
V
PIN3
≤
0.8
A=
Semelab plc.
Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
LAB
APPLICATIONS INFORMATION
Oscillator Waveforms and Maximum Duty Cycle
LARGE R
T
SMALL C
T
SEME
IP1844A SERIES
IP1845A SERIES
V
PIN4
(V
PIN7
for 14 pin D package)
INTERNAL CLOCK
OUTPUT – Max. Duty Cycle
V
PIN6
(V
PIN10
for 14 pin D package)
V
REF
8
R
T
R
T
C
T
4
C
T
GND
5
LARGE C
T
SMALL R
T
V
PIN4
(V
PIN7
for 14 pin D package)
INTERNAL CLOCK
OUTPUT – Max. Duty Cycle
V
PIN6
(V
PIN10
for 14 pin D package)
Oscillator timing capacitor C
T
is charged by V
REF
t
c
≈
0.55 R
T
C
T
through R
T
and discharged by an internal current source.
.0063 R
T
– 2.3
During the discharge time, the internal clock signal
t
d
≈
R
T
C
T
R
n
.0063 – 4
blanks the output to the low state. Selection of R
T
and
1
C
T
therefore determines both oscillator frequency and
Resultant frequency f =
(t
c
+ t
d
)
maximum duty cycle. Charge and discharge times are
determined by the formulae:
For R
T
> 5kΩ,
Resultant frequency f
≈
1.8
(R
T
C
T
)
(
)
Open–Loop Laboratory Test Fixture
V
REF
R
T
4.7kΩ
2N2222
100k
Ω
1kΩ
ERROR AMP
ADJUST
I
SENSE
ADJUST
4.7kΩ
5kΩ
V
CC
1
COMP
2
V
FB
3
I
SENSE
4
R
T
/C
T
V
REF
8
V
CC
7
O/P
6
GND
5
GROUND
C
T
0.1
µF
0.1
µF
1k
Ω
1kW
OUTPUT
High peak current associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should
be connected close to pin 5 in a single point ground. The transistor and 5K potentiometer are used to sample the oscillator wave
form and apply an adjustable ramp to pin 3.
Semelab plc.
Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95
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