Integrated Power Semiconductors, Drivers & Passives
•
•
•
•
•
•
•
Output current 30A continuous with no derating up to
T
PCB
= 90°C and T
CASE
= 90°C
Operating frequency up to 1MHz
Dual sided heatsink capable
Very small 11mm x 11mm x 2.6mm profile
iP2001 footprint compatible
Internal features minimize layout sensitivity *
Optimized for very low power losses
iP2002 Power Block
Description
The iP2002 is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase of a typical discrete-based multiphase circuit are integrated into a single 11mm x 11mm x 2.6mm
BGA power block. The only additional components required for a complete multiphase converter are a PWM
IC, the external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2002 Internal Block Diagram
V
IN
PRDY
ENABLE
PWM
V
DD
MOSFET
Driver with
dead time
control
V
SW
SGND
PGND
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no concerns about double
pulsing, unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR Block will function normally without any
additional input power supply bypass capacitors. However, for reliable long term operation it is recommended that at least four 10uF ceramic input
decoupling capacitors are provided to the V
IN
pin of each power block. No additional bypassing is required on the V
DD
pin.
www.irf.com
03/20/03
1
iP2002
Parameter
V
IN
to PGND
V
DD
to SGND
PWM to SGND
Enable to SGND
Output RMS Current
Block Temperature
All specifications @ 25°C (unless otherwise specified)
Absolute Maximum Ratings :
Min
-
-
-0.3
-0.3
-
-40
Typ
-
-
-
-
-
-
Max
16
6.0
V
DD
+0.3
V
DD
+0.3
30
125
Units
V
V
V
V
A
°C
not to exceed 6.0V
not to exceed 6.0V
Conditions
Recommended Operating Conditions :
Parameter
Supply Voltage
Input Voltage Range
Output Voltage Range
Output Current Range
Operating Frequency
Operating Duty Cycle
Symbol
V
DD
V
IN
V
OUT
I
OUT
fsw
D
Min
4.6
3.0
0.9
-
150
-
Typ
5.0
-
-
-
-
-
Max
5.5
13.2
3.3
30
1000
85
Units
V
V
V
A
kHz
%
see Figs. 2 & 3
see Figs. 2, 4 & 8
see Fig. 2
see Figs. 2 & 5
Conditions
Electrical Specifications @ V
DD
= 5V (unless otherwise specified) :
Parameter
Block Power Loss
Turn On Delay
Turn Off Delay
V
IN
Quiescent Current
V
DD
Quiescent Current
Under-Voltage Lockout
Start Threshold
Hysteresis
Enable
Input Voltage High
Input Voltage Low
Power Ready
Logic Level High
Logic Level Low
PWM Input
Logic Level High
Logic Level Low
Symbol
P
BLK
t
d(on)
t
d(off)
I
Q-VIN
I
Q-VDD
UVLO
V
START
V
Hys-UVLO
Enable
V
IH
V
IL
PRDY
V
OH
V
OL
PWM
V
OH
V
OL
Min
-
-
-
-
-
4.2
-
2.0
-
4.5
-
2.0
-
Typ
7.2
63
26
-
-
4.4
.05
-
-
4.6
0.1
-
-
Max
8.9
-
-
1.0
10
4.5
-
-
0.8
-
0.2
-
0.8
Units
W
ns
mA
µA
V
Conditions
V
IN
= 12V, V
OUT
= 1.3V,
I
OUT
= 30A, f
SW
= 1MHz
Enable = 0V, V
IN
= 12V
Enable = 0V, V
DD
= 5V
V
V
V
DD
= 4.6V, I
Load
= 10mA
V
DD
< UVLO Threshold, I
Load
= 1mA
V
Measurement were made using four 10uF (TDK C3225X7R1C106M or equiv.) capacitors across the input (see
Fig. 8).
Not associated with the rise and fall times. Does not affect Power Loss (see Fig. 9).
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