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Description
Advanced Process Technology
Surface Mount (IRFZ48NS)
Low-profile through-hole (IRFZ48NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free
G
IRFZ48NSPbF
IRFZ48NLPbF
D
PD - 95125
HEXFET
®
Power MOSFET
V
DSS
= 55V
R
DS(on)
= 0.014Ω
I
D
= 64A
S
Advanced HEXFET
®
Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-resistance
in any existing surface mount package. The D
2
Pak is
suitable for high current applications because of its low
internal connection resistance and can dissipate up to 2.0W
in a typical surface mount application.
The through-hole version (IRFZ48NL) is available for low-
profile applications.
D 2 Pak
TO-262
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
64
45
210
3.8
130
0.83
± 20
32
13
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
qJC
R
qJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
–––
Max.
1.15
40
Units
°C/W
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1
3/18/04
IRFZ48NS/LPbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
g
fs
Forward Transconductance
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
E
AS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
Min.
55
–––
–––
2.0
24
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
14
mΩ V
GS
= 10V, I
D
= 32A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 32A
25
V
DS
= 55V, V
GS
= 0V
µA
250
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
81
I
D
= 32A
19
nC V
DS
= 44V
30
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
= 28V
–––
I
D
= 32A
ns
–––
R
G
= 0.85Ω
–––
V
GS
= 10V, See Fig. 10
–––
nH Between lead,
and center of die contact
1970 –––
V
GS
= 0V
470 –––
V
DS
= 25V
120 –––
pF
ƒ = 1.0MHz, See Fig. 5
700
190 mJ I
AS
= 32A, L = 0.37mH
Typ.
–––
0.058
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
12
78
34
50
7.5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
64
––– –––
showing the
A
G
integral reverse
––– ––– 210
S
p-n junction diode.
––– ––– 1.3
V
T
J
= 25°C, I
S
= 32A, V
GS
= 0V
––– 68 100
ns
T
J
= 25°C, I
F
= 32A
––– 220 330
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting T
J
= 25°C, L = 0.37mH
T
J
≤
175°C
Pulse width
≤
400µs; duty cycle
≤
2%.
This is the destructive value not limited to the thermal limit.
This is the thermal limited value.
R
G
= 25Ω, I
AS
= 32A. (See Figure 12)
I
SD
≤
32A, di/dt
≤
220A/µs, V
DD
≤
V
(BR)DSS
,
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
2
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IRFZ48NS/LPbF
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
1000
I
D
, Drain-to-Source Current (A)
100
I
D
, Drain-to-Source Current (A)
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
4.5V
10
10
4.5V
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
1
0.1
20µs PULSE WIDTH
T
J
= 175
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
2.5
T
J
= 25
°
C
T
J
= 175
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 64A
I
D
, Drain-to-Source Current (A)
2.0
100
1.5
1.0
10
0.5
1
V DS = 25V
20µs PULSE WIDTH
4
6
8
10
12
0.0
-60 -40 -20 0
V
GS
= 10V
20 40 60 80 100 120 140 160 180
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRFZ48NS/LPbF
3500
3000
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= 32A
V
DS
= 44V
V
DS
= 27V
V
DS
= 11V
16
C, Capacitance (pF)
2500
2000
1500
1000
500
Ciss
12
8
Coss
Crss
4
0
1
10
100
0
FOR TEST CIRCUIT
SEE FIGURE 13
0
20
40
60
80
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
100
T
J
= 175
°
C
ID , Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100µsec
10
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
1
10
VDS , Drain-toSource Voltage (V)
10
T
J
= 25
°
C
1
10msec
0.1
0.2
V
GS
= 0 V
0.7
1.2
1.7
2.2
0.1
100
V
SD
,Source-to-Drain Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFZ48NS/LPbF
70
V
DS
60
R
D
V
GS
R
G
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
D.U.T.
+
I
D
, Drain Current (A)
50
40
30
20
10
0
-
V
DD
Fig 10a.
Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
T
C
, Case Temperature ( ° C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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