D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
74AC16244 • 74ACT16244 16-Bit Buffer/Line Driver with 3-STATE Outputs
August 1999
Revised May 2005
74AC16244 • 74ACT16244
16-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The AC16244 and ACT16244 contain sixteen non-inverting
buffers with 3-STATE outputs designed to be employed as
a memory and address driver, clock driver, or bus oriented
transmitter/receiver. The device is nibble controlled. Each
nibble has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation.
Features
s
Separate control logic for each byte and nibble
s
16-bit version of the AC244/ACT244
s
Outputs source/sink 24 mA
s
ACT16244 has TTL-compatible inputs
Ordering Code:
Order Number
74AC16244SSC
74ACT16244SSC
74ACT16244MTD
Package Number
MS48A
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
n
I
0
- I
15
O
0
- 0
15
Description
Output Enable Input (Active LOW)
Inputs
Outputs
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500295
www.fairchildsemi.com
74AC16244 • 74ACT16244
Functional Description
The AC16244 and ACT16244 contain sixteen non-inverting
buffers with 3-STATE standard outputs. The device is nib-
ble (4 bits) controlled with each nibble functioning identi-
cally, but independent of the other. The control pins can be
shorted together to obtain full 16-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input for each nibble. When OE
n
is LOW, the outputs are in
2-state mode. When OE
n
is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
Truth Tables
Inputs
OE
1
L
L
H
I
0
–I
3
L
H
X
Outputs
O
0
–O
3
L
H
Z
OE
2
L
L
H
Inputs
I
4
–I
7
L
H
X
Outputs
O
4
–O
7
L
H
Z
Inputs
OE
3
L
L
H
L LOW Voltage Level
H HIGH Voltage Level
Outputs
I
8
–I
11
L
H
X
O
8
–O
11
L
H
Z
X
Z
Inputs
OE
4
L
L
H
Immaterial
High Impedance
Outputs
I
12
–I
15
L
H
X
O
12
–O
15
L
H
Z
Logic Diagram
www.fairchildsemi.com
2
74AC16244 • 74ACT16244
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
V
I
V
O
0.5V to
7.0V
20 mA
20 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
AC
ACT
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
V/
'
t)
AC Devices
V
IN
from 30% to 70%
V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (
'
V/
'
t)
ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
¥
circuits outside databook specifications.
0.5V
V
CC
0.5V
0.5V
V
CC
0.5V
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
DC Output Diode Current (I
OK
)
20 mA
20 mA
0.5V to V
CC
0.5V
DC Output Voltage (V
O
)
DC Output Source/Sink Current (I
O
)
r
50 mA
V
O
DC V
CC
or Ground Current
per Output Pin
Junction Temperature
Storage Temperature
40
q
C to
85
q
C
r
50 mA
140
q
C
65
q
C to
150
q
C
125 mV/ns
DC Electrical Characteristics for AC
Symbol
V
IH
Parameter
Minimum HIGH Input Voltage
V
CC
(V)
3.0
4.5
5.5
V
IL
Maximum LOW Input Voltage
3.0
4.5
5.5
V
OH
Minimum HIGH Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum LOW Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
OZ
Maximum 3-STATE Leakage Current
5.5
0.002
0.001
0.001
T
A
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
0.50
25
q
C
T
A
40
q
C to
85
q
C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
Guaranteed Limits
Units
V
OUT
V
Conditions
0.1V
or V
CC
0.1V
V
OUT
0.1V
V
or V
CC
0.1V
V
I
OUT
I
OH
50
P
A
-12 mA
V
I
OH
I
OH
24 mA
24 mA (Note 2)
50
P
A
12 mA
24 mA
24 mA (Note 2)
V
IL
, V
IH
V
CC
, GND
V
CC
, GND
V
CC
, GND
V
CC
or GND
1.65V Max
3.85V Min
V
I
OUT
I
OL
V
I
OL
I
OL
r
5.0
P
A
V
I
(OE)
V
I
V
O
I
IN
I
CC
I
OLD
I
OHD
Maximum Input Leakage Current (Note 3)
Max Quiescent Supply Current (Note 3)
Minimum Dynamic
Output Current (Note 4)
5.5
5.5
5.5
5.5
r
0.1
8.0
r
1.0
80.0
75
P
A
P
A
mA
mA
V
I
V
IN
V
OLD
V
OHD
75
Note 2:
All outputs loaded; thresholds associated with output under test.
Note 3:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Note 4:
Maximum test duration 2.0 millisecond; one output loaded at a time.
3
www.fairchildsemi.com
74AC16244 • 74ACT16244
DC Electrical Characteristics for ACT
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Input Voltage
Maximum LOW Input Voltage
Minimum HIGH Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW Output Voltage
4.5
5.5
4.5
5.5
I
OZ
I
IN
I
CCT
I
CC
I
OLD
I
OHD
Maximum 3-STATE Leakage Current
Maximum Input Leakage Current
Maximum I
CC
/Input
Max Quiescent Supply Current
Minimum Dynamic
Output Current (Note 6)
5.5
5.5
5.5
5.5
5.5
0.6
8.0
0.001
0.001
T
A
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
25
q
C
T
A
40
q
C to
85
q
C
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
Guaranteed Limits
Units
V
V
V
V
OUT
V
OUT
Conditions
0.1V
0.1V
or V
CC
0.1V
or V
CC
0.1V
I
OUT
V
IN
50
P
A
V
IL
or V
IH
V
I
OH
I
OH
24 mA
24 mA (Note 5)
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 5)
V
IL
, V
IH
V
CC
, GND
V
CC
, GND
V
CC
2.1V
V
CC
or GND
1.65V Max
3.85V Min
V
I
OUT
V
IN
V
I
OH
I
OH
V
I
V
O
V
I
V
I
V
IN
V
OLD
V
OHD
r
0.5
r
0.1
r
5.0
r
1.0
1.5
80.0
75
P
A
P
A
mA
P
A
mA
mA
75
Note 5:
All outputs loaded; thresholds associated with output under test.
Note 6:
Maximum test duration 2.0 millisecond; one output loaded at a time.
www.fairchildsemi.com
4
京公网安备 11010802033920号
EEWORLD
