HEF4052B-Q100
Dual 4-channel analog multiplexer/demultiplexer
Rev. 2 — 11 September 2014
Product data sheet
1. General description
The HEF4052B-Q100 is a dual 4-channel analog multiplexer/demultiplexer with common
channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs
(nY0 to nY3) and a common input/output (nZ). The common channel select logic includes
two select inputs (S1 and S2) and an active LOW enable input (E). Both
multiplexers/demultiplexers contain four bidirectional analog switches, each with one side
connected to an independent input/output (nY0 to nY3) and the other side connected to a
common input/output (nZ). With E LOW, one of the four switches is selected
(low-impedance ON-state) by S1 and S2. With E HIGH, all switches are in the
high-impedance OFF-state, independent of S1 and S2. If break before make is needed,
then it is necessary to use the enable input.
V
DD
and V
SS
are the supply voltage connections for the digital control inputs (S1 and S2,
and E). The V
DD
to V
SS
range is 3 V to 15 V. The analog inputs/outputs (nY0 to nY3, and
nZ) can swing between V
DD
as a positive limit and V
EE
as a negative limit. V
DD
V
EE
may
not exceed 15 V. Unused inputs must be connected to V
DD
, V
SS
, or another input. For
operation as a digital multiplexer/demultiplexer, V
EE
is connected to V
SS
(typically
ground). V
EE
and V
SS
are the supply voltage connections for the switches.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
MIL-STD-833, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0
)
Complies with JEDEC standard JESD 13-B
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
NXP Semiconductors
HEF4052B-Q100
Dual 4-channel analog multiplexer/demultiplexer
4. Ordering information
Table 1.
Ordering information
All types operate from
40
C to +125
C.
Type number
HEF4052BT-Q100
HEF4052BTT-Q100
Package
Name
SO16
TSSOP16
Description
plastic small outline package; 16 leads; body width 3.9 mm
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
Version
SOT109-1
SOT403-1
5. Functional diagram
VDD
16
13
12
1Z
1Y0
14
1Y1
15
S1
10
11
LOGIC
LEVEL
CONVERSION
1 - OF - 4
DECODER
1Y2
1Y3
S2
9
1
2Y0
5
6
2
2Y1
E
2Y2
4
3
8
V
SS
7
mnb042
2Y3
2Z
V
EE
Fig 1.
Functional diagram
nYn
V
DD
V
DD
nZ
V
EE
001aak604
Fig 2.
HEF4052B_Q100
Schematic diagram (one switch)
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 11 September 2014
2 of 21
NXP Semiconductors
HEF4052B-Q100
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
Fig 6.
Pin configuration SOT109-1
Fig 7.
Pin configuration SOT403-1
6.2 Pin description
Table 2.
Symbol
E
V
EE
V
SS
S1, S2
1Z, 2Z
V
DD
Pin description
Pin
6
7
8
10, 9
13, 3
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
common output or input
supply voltage
1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15, 11, 1, 5, 2, 4
HEF4052B_Q100
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 11 September 2014
5 of 21
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