IDT49FCT805ASOG datasheet, PDF

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IDT49FCT805ASOG: DescriptionLow Skew Clock Driver, FCT Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, GREEN, SOIC-20; Categorylogic logic; File Size67KB，7 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT49FCT805ASOG Overview

Low Skew Clock Driver, FCT Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, GREEN, SOIC-20

IDT49FCT805ASOG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP, SOP20,.4
Contacts	20
Reach Compliance Code	compliant
ECCN code	EAR99
series	FCT
Input adjustment	SCHMITT TRIGGER
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
length	12.8016 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.064 A
Humidity sensitivity level	1
Number of functions	2
Number of inverted outputs
Number of terminals	20
Actual output times	5
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP20,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Prop。Delay @ Nom-Sup	5.8 ns
propagation delay (tpd)	5.3 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.7 ns
Maximum seat height	2.6416 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5184 mm
Base Number Matches	1

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IDT49FCT805/A

FAST CMOS BUFFER/CLOCK DRIVER

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE

FAST CMOS

BUFFER/CLOCK DRIVER

IDT49FCT805/A

FEATURES:

•

0.5 MICRON CMOS Technology

Guaranteed low skew < 700ps (max.)

Low duty cycle distortion < 1ns (max.)

Low CMOS power levels

TTL compatible inputs and outputs

Rail-to-rail output voltage swing

High drive: -24mA I

, +64mA I

Two independent output banks with 3-state control

1:5 fanout per bank

"Heartbeat" monitor output

Available in SSOP and SOIC packages

DESCRIPTION:

The 49FCT805 is a non-inverting buffer/clock driver built using ad-

vanced dual metal CMOS technology. Each bank consists of two banks of

drivers. Each bank drives five output buffers from a standard TTL

compatible input. These devices feature a “heart-beat” monitor for

diagnostics and PLL driving. The MON output is identical to all other outputs

and complies with the output specifications in this document.

The 49FCT805 offers low capacitance inputs and hysteresis. Rail-to-rail

output swing improves noise margin and allows easy interface with CMOS

inputs.

NOTE: EOL for non-green parts to occur on 5/13/10 per

PDN U-09-01

FUNCTIONAL BLOCK DIAGRAM

-OA

-OB

MON

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE

2006

Integrated Device Technology, Inc.

SEPT. 2009

DSC-5836/5

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