®
ISL6554
Data Sheet
February 11, 2005
FN9003.3
Microprocessor CORE Voltage Regulator
Using Multi-Phase Buck PWM Control
Without Programmable Droop
The ISL6554 is the first controller in the Intersil Multi-Phase
family without the programmable droop feature. The
ISL6554 in combination with the HIP6601A, HIP6602A or
HIP6603A companion gate drivers and Intersil MOSFETs
form a complete solution for high-current, high slew-rate
applications. The ISL6554 regulates output voltage,
balances load currents and provides protective functions for
two to four synchronous-rectified buck-converter channels.
A novel approach to current sensing is used to reduce
overall solution cost. The voltage developed across the
lower MOSFET’s parasitic on-resistance during conduction
is sampled and fed back to the controller. This lossless
current-sensing approach allows the controller to maintain
phase-current balance between the power channels and
overcurrent protection.
A 5-bit DAC allows digital programming of the output voltage
in 25mV steps over a range from 0.95V to 1.70V with a
system accuracy of
±1%.
Internal pull ups on each DAC
input make external pull-up resistors unnecessary when
interfacing with open-drain output signals.
The PGOOD signal is held low during soft-start until the
output voltage increases to within 4% of the programmed.
When the CORE voltage falls 9% below the programmed
VID level, an undervoltage condition is detected and results
in PGOOD transitioning low.
In the event of an overvoltage condition, The converter shuts
down and turns ON the lower MOSFETs to clamp and
protect the microprocessor. Overcurrent protection reduces
the regulator RMS output current to 41% of the programmed
overcurrent trip value. These features provide monitoring
and protection for the microprocessor and power system.
Features
• Multi-Phase Power Conversion
• Precision Channel Current Balance
- Lossless Current Sampling - Uses r
DS(ON)
• Precision CORE Voltage Regulation
-
±1%
System Accuracy Over Temperature
- No Programmable Droop
• Microprocessor Voltage Identification Input
- 5-Bit VID Decoder
- 0.95V to 1.70V in 25mV Steps
• Fast Transient Response
• Overcurrent Protection
• Selection of 2, 3, or 4 Phase Operation
• High Ripple Frequency (80kHz to 2MHz)
• Pb-Free Available (RoHS Compliant)
Applications
• Power Supply Controller for Intel® Itanium™ Processor
Family
• Voltage Regulator Modules
• Servers and Workstations
Ordering Information
PART NUMBER
ISL6554CB
ISL6554CB-T
ISL6554CBZ (Note)
ISL6554CBZ-T (Note)
ISL6554CBZA (Note)
TEMP. (°C)
0 to 70
PACKAGE
20 Ld SOIC
PKG.
DWG. #
M20.3
20 Ld SOIC Tape and Reel
0 to 70
20 Ld SOIC
(PB-free)
M20.3
20 Ld SOIC Tape and Reel (PB-free)
0 to 70
20 Ld SOIC
(PB-free)
M20.3
Pinout
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
GND 9
ISL6554 (SOIC)
TOP VIEW
20 VCC
19 PGOOD
18 PWM4
17 ISEN4
16 ISEN1
15 PWM1
14 PWM2
13 ISEN2
12 ISEN3
11 PWM3
ISL6554CBZA-T (Note)
20 Ld SOIC Tape and Reel (PB-free)
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
VSEN 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, 2004, 2005. All Rights Reserved. Intel® is a registered trademark of Intel Corporation.
Itanium™ is a trademark of Intel Corporation. All other trademarks mentioned are the property of their respective owners.
ISL6554
Simplified Power System Diagram
VSEN
PWM 1
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
PWM 2
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
MICROPROCESSOR
ISL6554
PWM 3
PWM 4
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
VID
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
Functional Pin Description
VID4 1
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
GND 9
VSEN 10
20 VCC
19 PGOOD
18 PWM4
17 ISEN4
16 ISEN1
15 PWM1
14 PWM2
13 ISEN2
12 ISEN3
11 PWM3
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 10.
GND (Pin 9)
Bias and reference ground. All signals are referenced to this
pin.
VSEN (Pin 10)
Power good monitor input. Connect to the microprocessor-
CORE voltage.
PWM1 (Pin 15), PWM2 (Pin 14), PWM3 (Pin 11) and
PWM4 (Pin 18)
PWM outputs for each driven channel in use. Connect these
pins to the PWM input of an HIP6601/2/3 driver. For systems
which use 3 channels, connect PWM4 high. Two channel
systems connect PWM3 and PWM4 high.
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4)
and VID0 (Pin 5)
Voltage Identification inputs from microprocessor. These
pins respond to TTL and 3.3V logic signals. The ISL6554
decodes VID bits to establish the output voltage. See
Table 1.
ISEN1 (Pin 16), ISEN2 (Pin 13), ISEN3 (Pin 12) and
ISEN4 (Pin 17)
Current sense inputs from the individual converter channel’s
phase nodes. Unused sense lines MUST be left open.
COMP (Pin 6)
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
PGOOD (Pin 19)
Power good. This pin provides a logic-high signal when the
microprocessor CORE voltage is within specified limits and
soft-start has timed out.
FB (Pin 7)
Inverting input of the internal error amplifier.
VCC (Pin 20)
Bias supply. Connect this pin to a 5V supply.
FS/DIS (Pin 8)
Channel frequency, F
SW
, select and disable. A resistor from
this pin to ground sets the switching frequency of the
3
FN9003.3
February 11, 2005
京公网安备 11010802033920号
EEWORLD
