DATASHEET
ISL6566A
Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and
One External Driver Signal
The ISL6566A three-phase PWM control IC provides a
precision voltage regulation system for advanced
microprocessors. The integration of power MOSFET drivers
into the controller IC marks a departure from the separate
PWM controller and driver configuration of previous multi-
phase product families. By reducing the number of external
parts, this integration is optimized for a cost and space
saving power management solution.
Outstanding features of this controller IC include programmable
VID codes compatible with Intel VRM9, VRM10, as well as
AMD Hammer microprocessors. A unity gain, differential
amplifier is provided for remote voltage sensing, compensating
for any potential difference between remote and local grounds.
The output voltage can also be positively or negatively offset
through the use of a single external resistor.
A unique feature of the ISL6566A is the combined use of
both DCR and r
DS(ON)
current sensing. Load line voltage
positioning (droop) and overcurrent protection are
accomplished through continuous inductor DCR current
sensing, while r
DS(ON)
current sensing is used for accurate
channel-current balance. Using both methods of current
sampling utilizes the best advantages of each technique.
Protection features of this controller IC include a set of
sophisticated overvoltage, undervoltage, and overcurrent
protection. Overvoltage results in the converter turning the
lower MOSFETs ON to clamp the rising output voltage and
protect the microprocessor. The overcurrent protection level is
set through a single external resistor. Furthermore, the
ISL6566A includes protection against an open circuit on the
remote sensing inputs. Combined, these features provide
advanced protection for the microprocessor and power system.
FN9200
Rev 2.00
Jul 27, 2005
Features
• Integrated Multi-Phase Power Conversion
- 1 or 2-Phase Operation with Internal Drivers
- 3-Phase Operation with External PWM Driver Signal
• Precision Core Voltage Regulation
- Differential Remote Voltage Sensing
-
0.5%
System Accuracy Over Temperature
- Adjustable Reference-Voltage Offset
• Precision Channel Current Sharing
- Uses Loss-Less r
DS(ON)
Current Sampling
• Accurate Load Line Programming
- Uses Loss-Less Inductor DCR Current Sampling
• Variable Gate Drive Bias: 5V to 12V
• Microprocessor Voltage Identification Inputs
- Up to a 6-Bit DAC
- Selectable between Intel’s VRM9, VRM10, or AMD
Hammer DAC codes
- Dynamic VID-on-the-fly Technology
• Multi-tiered Overvoltage and Overcurrent Protection
• Digital Soft-Start
• Selectable Operation Frequency up to 1.5MHz Per Phase
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
ISL6566A (QFN)
TOP VIEW
UGATE1
31
30 BOOT1
29 PHASE1
28 NC
27 PWM3
41
GND
26 NC
25 ISEN3
24 EN_PH3
23 NC
22 PHASE2
21 BOOT2
11
RGND
12
VSEN
13
OCSET
14
ICOMP
15
ISUM
16
IREF
17
LGATE2
18
PVCC2
19
ISEN2
20
UGATE2
LGATE1
PGOOD
PVCC1
33
ISEN1
32
ENLL
37
VID2
VID3
VID4
Ordering Information
PART NUMBER*
ISL6566ACR
ISL6566ACRZ (Note)
ISL6566ACRZA (Note)
ISL6566AIR
ISL6566AIRZ (Note)
ISL6566AIRZA (Note)
TEMP.
(°C)
0 to 70
0 to 70
0 to 70
PACKAGE
40 Ld 6x6 QFN
PKG.
DWG. #
L40.6x6
VID1
VID0
VID12.5
VRM10
REF
OFS
VCC
COMP
FB
1
2
3
4
5
6
7
8
9
40
39
38
FS
36
35
34
40 Ld 6x6 QFN (Pb-free) L40.6x6
40 Ld 6x6 QFN (Pb-free) L40.6x6
L40.6x6
-40 to 85 40 Ld 6x6 QFN
-40 to 85 40 Ld 6x6 QFN (Pb-free) L40.6x6
-40 to 85 40 Ld 6x6 QFN (Pb-free) L40.6x6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020
*Add “-T” suffix for tape and reel.
VDIFF 10
FN9200 Rev 2.00
Jul 27, 2005
Page 1 of 29
ISL6566A
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, V
BOOT
. . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, V
PHASE
. . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20µJ) to 24V (<200ns, V
BOOT-PHASE
= 12V)
Upper Gate Voltage, V
UGATE
. . . . V
PHASE
- 0.3V to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2µJ) to V
BOOT
+ 0.3V
Lower Gate Voltage, V
LGATE
. . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
QFN Package (Notes 1, 2) . . . . . . . . . .
32
3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V
5%
Ambient Temperature (ISL6566ACR, ISL6566ACRZ) . . 0°C to 70°C
Ambient Temperature (ISL6566AIR, ISL6566AIRZ) . .-40°C to 85°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
Recommended Operating Conditions, Unless Otherwise Specified.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
VCC POR (Power-On Reset) Threshold
I
VCC
; ENLL = high
I
PVCC
; ENLL = high
VCC Rising
VCC Falling
PVCC POR (Power-On Reset) Threshold
PVCC Rising
PVCC Falling
Oscillator Ramp Amplitude (Note 3)
Maximum Duty Cycle (Note 3)
Oscillator Frequency, F
SW
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Hysteresis
EN_PH3 Rising Threshold
EN_PH3 Falling Threshold
COMP Shutdown Threshold
REFERENCE AND DAC
System Accuracy (VID = 1.0V - 1.850V)
System Accuracy (VID = 0.8V - 1.0V)
DAC Input Low Voltage (VR9, VR10)
DAC Input High Voltage (VR9, VR10)
DAC Input Low Voltage (AMD)
-0.5
-0.8
-
0.8
-
-
-
-
-
-
0.5
0.8
0.4
-
0.6
%
%
V
V
V
COMP Falling
-
-
1.190
1.000
0.2
0.66
100
1.220
1.045
0.3
-
-
1.250
1.090
0.4
V
mV
V
V
V
R
T
= 100k (
0.1%)
V
PP
-
-
4.25
3.75
4.25
3.60
-
-
225
15
1.06
4.38
3.88
4.38
3.88
1.50
66.6
250
20
-
4.50
4.00
4.50
4.00
-
-
275
mA
mA
V
V
V
V
V
%
kHz
FN9200 Rev 2.00
Jul 27, 2005
Page 5 of 29
Integrated technical exchanges
京公网安备 11010802033920号
EEWORLD
