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IDT74FCT138ATSO

Description
Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, SOIC-16
Categorylogic    logic   
File Size107KB,6 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT74FCT138ATSO Overview

Decoder/Driver, FCT Series, Inverted Output, CMOS, PDSO16, SOIC-16

IDT74FCT138ATSO Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionSOIC-16
Contacts16
Reach Compliance Codenot_compliant
ECCN codeEAR99
Other features3 ENABLE INPUTS
seriesFCT
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length10.3632 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOTHER DECODER/DRIVER
MaximumI(ol)0.048 A
Humidity sensitivity level1
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)225
power supply5 V
Prop。Delay @ Nom-Sup5.8 ns
propagation delay (tpd)5.8 ns
Certification statusNot Qualified
Maximum seat height2.649 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5057 mm
Base Number Matches1
Integrated Device Technology, Inc.
FAST CMOS
1-OF-8 DECODER
WITH ENABLE
DESCRIPTION:
IDT54/74FCT138T/AT/CT
FEATURES:
Std., A and C speed grades
Low input and output leakage
≤1µA
(max.)
CMOS power levels
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, QSOP, CERPACK and
LCC packages
The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built
using an advanced dual metal CMOS technology. The IDT54/
74FCT138T/AT/CT accepts three binary weighted inputs (A
0
,
A
1
, A
2
) and, when enabled, provides eight mutually exclusive
active LOW outputs (
O
0
-
O
7
). The IDT54/74FCT138T/AT/CT
features three enable inputs, two active LOW (
E
1
,
E
2
) and one
active HIGH (E
3
). All outputs will be HIGH unless
E
1
and
E
2
are
LOW and E
3
is HIGH. This multiple enable function allows
easy parallel expansion of the device to a 1-of-32 (5 lines to
32 lines) decoder with just four IDT54/74FCT138T/AT/CT
devices and one inverter.
FUNCTIONAL BLOCK DIAGRAM
A
2
A
1
A
0
E
1
E
2
E
3
PIN CONFIGURATIONS
A
0
A
1
A
2
E
1
E
2
E
3
O
7
GND
1
2
3
4
5
6
7
8
P16-1
D16-1
SO16-1
SO16-7
&
E16-1
16
15
14
13
12
11
10
9
V
CC
O
0
O
1
O
2
O
3
O
4
O
5
O
6
2570 drw 02
DIP/SOIC/QSOP/CERPACK
TOP VIEW
INDEX
V
CC
NC
1
A
1
A
0
3 2
A
2
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
2570 drw 01
4
5
6
7
8
20 19
18
17
16
15
14
O
0
O
1
O
2
NC
O
3
O
4
E
1
NC
E
2
E
3
L20-2
9 10 11 12 13
GND
NC
O
7
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995
Integrated Device Technology, Inc.
O
6
O
5
2570 drw 03
APRIL 1995
DSC-4213/5
6.3
1

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