DM74LS75N datasheet, PDF - EEWORLD Datasheet

DM74LS75N: DescriptionLS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16; Categorylogic logic; File Size142KB，3 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16

Parameter Name	Attribute value
Maker	Texas Instruments
package instruction	DIP, DIP16,.3
Reach Compliance Code	unknown
series	LS
JESD-30 code	R-PDIP-T16
JESD-609 code	e0
length	21.755 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	D LATCH
MaximumI(ol)	0.008 A
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Maximum supply current (ICC)	12 mA
Prop。Delay @ Nom-Sup	30 ns
propagation delay (tpd)	30 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	HIGH LEVEL
width	7.62 mm
Base Number Matches	1

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