ZC0302
VGA & CIF USB PC Camera Controller
ZC0302
VGA USB PC Camera Processor
Vimicro Corporation
Data Sheet
Vimicro
Corporation reserves the right to make changes without further notice to any product herein to improve
reliability, function or design.
Vimicro
does not assume any liability arising out of the application or use of any
project, circuit described herein; neither does it convey any license under its patent nor the right of others.
This document contains information of a proprietary nature. None of this information shall be divulged to persons
other than
Vimicro
Corporation employee authorized by the nature of their duties to receive such information, or
individuals or organizations authorized by
Vimicro
Corporation.
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Mar. 2002
ZC0302
VGA & CIF USB PC Camera Controller
Contents
1. Features 4
1.1. General Features
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5
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6
6
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6
6
6
8
8
2. Architecture
5
2.1. ZC0302 Block Diagram
2.2. CMOS Image Sensor Interfaces
2.3. USB Features
2.4. Image Signal Processing
2.5. Raster
2.6. Compression Engine
2.7. Audio Interface
2.8. System Controller
3. Pin Definition
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10
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12
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3.1. Pin Assignment
3.2. Pin Description
4. Electrical Characteristics
4.1. Absolute Maximum Ratings
4.2. DC Characteristics
4.3. USB Transceiver AC Characteristics
4.4. RESET Timing AC Characteristics
4.5. Clock AC Characteristics
4.6. Input Signal AC Characteristics
4.7. Output Signal AC Characteristic
5. Mechanical Information 13
6. Appendix 13
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Mar. 2002
ZC0302
VGA & CIF USB PC Camera Controller
Illustrations
Figure 1 USB PC Camera System Block Diagram
Figure 2 Block diagram of ZC0302
Figure 3 48-Pin LQFP Package
Figure 4 RESET Timing AC Characteristics Diagram
Figure 5 Clock Timing AC Characteristics Diagram
Figure 6. Input signal AC characteristics
Figure 7. VSYNC/HSYNC output AC characteristics
Figure 8. 48-Pin LQFP Package Diagram (OMITTED)
Figure 9. Serial Bus Timing Diagram
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13
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Tables
Table 3.1 ZC0302 Pin Descriptions
Table 4.1 Absolute Maximum Ratings
Table 4.2 DC Characteristics
Table 4.3 Full-Speed Driver Electrical Characteristics
Table 4.4 Low-Speed Driver Electrical Characteristics
Table 4.5 Reset Signal AC Characteristics
Table 4.6 Clock Signal AC Characteristics
Table 4.7 CS_D input signal AC Characteristics
Table 4.8 Vsync / Hsync input AC Characteristics
Table 4.9 Vsync / Hsync output AC characteristics
Table 5.1 ZC0302 Package Dimension
Table 7. Serial Bus Timing Table
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Mar. 2002
ZC0302
VGA & CIF USB PC Camera Controller
1. Features
EEPROM
ESCK
ESDA
VSYNC
HSYNC
DATA[8:0]
PCLK
ENB
Serial Interface
CMOS IMAGE SENSORS
OSCIN
OSCOUT
CRYSTAL
48M Hz
ZC0302
USB CABLE
PC
MIC
F
IGURE
1 USB PC C
AMERA
S
YSTEM
B
LOCK
D
IAGRAM
The ZC0302 chip provides a cost effective single chip solution for the PC camera application. It communicates with
PC host via Universal Serial Bus (USB) port. All major image processing functions, such as image signal
processing (ISP), image data compression and data transfer units are built in the chip. Meanwhile ZC0302 also
provides high quality audio sampling function for sound recording. The audio function complies with USB audio class
1.0.
ZC0302 is designed as a cost-effective single-chip device replacing the complex and costly chip sets used in current
PC camera designs with embedded USB device controller and transceiver, 48-QFP package, and no external
DRAM requirement. Advanced on-chip image signal processor and JPEG encoder produce images with superior
quality.
1.1. General Features
Low cost, single chip solution for high resolution USB PC camera applications
Audio function complying to USB audio device class 1.0
Support up to 15 fps VGA video display without DRAM
USB Device Controller compliant with USB protocol 1.1
USB parameter configurable through EEPROM
Support 9/8-bit RGB Bayer pattern raw data input from CMOS image sensors
Support programmable color correction and gamma correction
Support programmable Auto Exposure/Auto White Balance
Support Auto Gain Control
Support ISO/IEC 10918-1 (JPEG) standard image compression
Support 4 quantization tables for programmable image quality
Support raw data output for high quality still image
3.3V I/O, 2.5V core
No external DRAM required
Flexible system level solution support
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Mar. 2002
ZC0302
VGA & CIF USB PC Camera Controller
2. Architecture
2.1. ZC0302 Block Diagram
EEPROM
MIC
CIS
(CMOS Image Sensor)
EEPROM
Interface
Audio
Interface
UDC
(USB Device Controller)
System Controller
CIS
Interface
PC
HOST
Subsample
&
Raster
ZC0302
F
IGURE
2 B
LOCK DIAGRAM OF
ZC0302
Figure 2 shows the block diagram of ZC0302. The ISP block receives RGB raw data from CMOS image sensor
interface and performs various image processing tasks such as white balance, color correction, gamma correction,
histogram equalization and so on. The Sub-sample & Raster block handles the input image data scaling and
converts input image data to 8x8 block data format required by DCT module. The JPEG Encoder block compresses
the image data from ISP block into JPEG format data. The compressed image data is then transferred to PC host
via USB Device Controller (UDC) block for display.
The Audio Interface takes the audio input in mono 16-bit PCM format, and then transfers it to PC Host through the
audio streaming pipe in UDC.
2.2. CMOS Image Sensor Interfaces
Support sensors from most CMOS image sensor vendors including Agilent, Hynix, IC Media, TASC, PixArt,
Photobit, OmniVision, and Century
9bit/8bit camera input interface
JPEG
Encoder
ISP
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Mar. 2002
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