EEWORLDEEWORLDEEWORLD

Part Number

Search

EDE1108AASE

Description
1G bits DDR2 SDRAM organized as 33,554,432 words x 8 banks.
File Size534KB,65 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
Download Datasheet Compare View All

EDE1108AASE Overview

1G bits DDR2 SDRAM organized as 33,554,432 words x 8 banks.

DATA SHEET
1G bits DDR2 SDRAM
EDE1104AASE (256M words
×
4 bits)
EDE1108AASE (128M words
×
8 bits)
Description
The EDE1104AASE is a 1G bits DDR2 SDRAM
organized as 33,554,432 words
×
4 bits
×
8 banks.
The EDE1108AASE is a 1G bits DDR2 SDRAM
organized as 16,777,216 words
×
8 bits
×
8 banks.
They are packaged in 68-ball FBGA (µBGA
) package.
Features
Power supply: VDD, VDDQ
=
1.8V
±
0.1V
Double-data-rate architecture: two data transfers per
clock cycle
Bi-directional, differential data strobe (DQS and
/DQS) is transmitted/received with data, to be used in
capturing data at the receiver
DQS is edge aligned with data for READs: center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge: data
and data mask referenced to both edges of DQS
8 internal banks for concurrent operation
Data mask (DM) for write data
Burst lengths: 4, 8
/CAS Latency (CL): 3, 4, 5
Auto precharge operation for each burst access
Auto refresh and self refresh modes
Average refresh period
7.8µs at 0°C
TC
≤ +85°C
3.9µs at
+85°C <
TC
≤ +95°C
SSTL_18 compatible I/O
Posted CAS by programmable additive latency for
better command and data bus efficiency
Off-Chip-Driver Impedance Adjustment and On-Die-
Termination for better signal quality
Programmable RDQS, /RDQS output for making
×
8
organization compatible to
×
4 organization
/DQS, (/RDQS) can be disabled for single-ended
Data Strobe operation.
FBGA (µBGA) package with lead free solder
(Sn-Ag-Cu)
Document No. E0404E20 (Ver. 2.0)
Date Published April 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2003-2005

EDE1108AASE Related Products

EDE1108AASE EDE1104AASE
Description 1G bits DDR2 SDRAM organized as 33,554,432 words x 8 banks. 1G bits DDR2 SDRAM organized as 33,554,432 words x 8 banks.
I want to learn msp430 and I want to buy a launchpad (I have already bought it)
Seeing the enthusiasm for learning in the forum, I also want to learn. I hope you can give me a spare launchpad. I will be very grateful. [[i] This post was last edited by Octopus on 2012-5-9 11:26 [/...
八爪鱼 Buy&Sell
Learn DSP basics: DSP/BIOS boot sequence
[p=26, null, left][color=#333333][font=Arial]When the DSP/BIOS application starts, it generally follows the following steps: [/font][/color][/p][p=26, null, left][color=#333333][font=Arial]1) Initiali...
Jacktang DSP and ARM Processors
DSP Fundamentals and Application System Design
DSP Fundamentals and Application System Design...
liuxun198352 DSP and ARM Processors
★★★Recruiting hardware/embedded engineers
1. Recruitment: Hardware Engineer Beijing Education: Bachelor degree or above Work experience: 1 year or more Work requirements: 1. Familiar with analog and digital circuits, have a relatively in-dept...
nongjie66 Embedded System
STM8S103K chip PB_4/PB_5 output abnormality
PB4/PB5 is set to output, and the high level is only about 0.5V. What is the problem?...
ye12 stm32/stm8
Looking for a software that can create pdf format files
Just as the title says....
范小川 Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 647  1028  2642  1280  858  14  21  54  26  18 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号