tenx technology
GENERAL DESCRIPTION
TM8705
4 Bit Microcontroller
The TM8705 is an embedded high-performance 4-bit microcomputer with LCD/LED driver.
It contains all the necessary functions, such as 4-bit parallel processing ALU, ROM, RAM,
I/O ports, timer, clock generator, dual clock operation, Resistance to Frequency
Converter(RFC), EL panel driver, LCD driver, look-up table, watchdog timer and key matrix
scanning circuitry in a signal chip.
FEATURE
1. Low power dissipation.
2. Powerful instruction set (178 instructions).
Binary addition, subtraction, BCD adjust, logical operation in direct and index
addressing mode.
Single-bit manipulation (set, reset, decision for branch).
Various conditional branch.
16 working registers and manipulation.
Table look-up.
LCD driver data transfer.
3. Memory capacity.
ROM capacity
RAM capacity
3072
384
x 16 bits.
x 4 bits.
4. LCD driver output.
6 common outputs and 40 segment outputs (up to drive 240 LCD segments).
1/2 Duty, 1/3 Duty, 1/4 Duty,1/5 Duty or 1/6Duty is selected by MASK option.
1/2 Bias or 1/3 Bias is selected by MASK option.
Single instruction to turn off all segments.
COM5~6,SEG1~40 could be defined as CMOS or P_open drain type output by
mask option.
5. Input/output ports.
Port IOA
4 pins (with internal pull-low), muxed with SEG24~SEG27.
Port IOB
4 pins (with internal pull-low). muxed with SEG28~SEG31
Port IOC
4 pins (with internal pull-low, low-level-hold), muxed with SEG32 ~
SEG35.
IOC port had built in the input signal chattering prevention circuitry.
Port IOD
4 pins (with internal pull-low), muxed with SEG36 ~ SEG39.
IOD port had built in the input signal chattering prevention circuitry.
6. 8 level subroutine nesting.
7. Interrupt function.
1
tenx technology, inc.
Rev 1.3
03/12/01
TM8705
External factors 4
Internal factors 4
(INT pin, Port IOC, IOD & KI input).
(Pre-Divider, Timer1, Timer2 & RFC).
8. Built-in EL-light driver.
ELC, ELP (Muxed with SEG28, SEG29).
9. Built in Alarm, clock or single tone melody generator.
BZB, BZ (Muxed with SEG30, SEG31).
10. Built-in resistance to frequency converter.
CX, RR, RT, RH (Muxed with SEG24 ~ SEG27).
11. Built in key matrix scanning function.
K1~K16 (Shared with SEG1~SEG16).
12. KI1~KI4 (Muxed with SEG32 ~ SEG35).
13. Two 6-bit programmable timer with programmable clock source.
14. Watch dog timer.
15. Built-in Voltage doubler, halver, tripler charge pump circuit.
16. Dual clock operation
slow clock oscillation can be defined as X’tal or external RC type oscillator by mask
option.
fast clock oscillation can be defined as 3.58MHz ceramic resonator, internal R or
external R type oscillator by mask option.
17. HALT function.
18. STOP function.
APPLICATION
Timer / Calendar / Calculator / Thermometer
2
tenx technology, inc.
Rev 1.3
03/12/01
TM8705
BLOCK DIAGRAM
B1-4
ELC, ELP
BZB,BZ
B-PORT
EL DRIVER
ALARM
A1-4
CX
RR,RT,RH
C1-4
KI1~4
D1-4
COM1-6
SEG1-40
VDD1-3
A-PORT
RFC
C-PORT
KEY-IN
LCD DRIVER
D-PORT
SEGMENT PLA
4 BITS DATA BUS
FREQUENCY
GENERATOR
INDEX ROM
256(16-N) X 8 BITS
DATA RAM
512 X 4 BITS
ALU
PRE-
DIVIDER
6 BITS PRESET
TIMER 1 & 2
CONTROL
CIRCUIT
RESET INT
8 LEVELS
STACK
12 BITS PROGRAM
COUNTER
INSTRUCTION
DECODER
PROGRAM ROM
(1024+128N)
X 16 BITS
N:0->16
OSCILLATOR
CUP0,1 XTIN,OUT CFIN,OUT
TM8705 BLOCK DIAGRAM
PAD DIAGRAM
40
50
30
60
1
20
10
The substrate of chip should be connected to GND.
3
tenx technology, inc.
Rev 1.3
03/12/01
TM8705
PAD COORDINATE
No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Name
BAK
XIN
XOUT
CFIN
CFOUT
GND
VDD1
VDD2
VDD3
CUP1
CUP2
COM1
COM2
COM3
COM4
COM5
COM6
SEG1(K1)
SEG2(K2)
SEG3(K3)
SEG4(K4)
SEG5(K5)
SEG6(K6)
SEG7(K7)
SEG8(K8)
SEG9(K9)
SEG10(K10)
SEG11(K11)
SEG12(K12)
SEG13(K13)
X
99.35
72.50
72.50
72.50
72.50
72.50
197.50
322.50
447.50
562.50
677.50
792.50
907.50
1022.50
1137.50
1252.50
1377.50
1502.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
Y
717.50
602.50
487.50
372.50
247.50
122.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
122.50
247.50
372.50
487.50
602.50
717.50
832.50
947.50
1062.50
1177.50
1292.50
1407.50
No
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Name
SEG14(K14)
SEG15(K15)
SEG16(K16)
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24/IOA1/CX
SEG25/IOA2/RR
SEG26/IOA3/RT
SEG27/IOA4/RH
SEG28/IOB1/ELC
SEG29/IOB2/ELP
SEG30/IOB3/BZB
SEG31/IOB4/BZ
SEG32/IOC1/KI1
SEG33/IOC2/KI2
SEG34/IOC3/KI3
SEG35/IOC4/KI4
SEG36/IOD1
SEG37/IOD2
SEG38/IOD3
SEG39/IOD4
SEG40
RESET
INT
TEST
X
1627.50
1627.50
1627.50
1627.50
1627.50
1627.50
1502.50
1377.50
1252.50
1137.50
1022.50
907.50
792.50
677.50
562.50
447.50
322.50
197.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
72.50
Y
1522.50
1637.50
1752.50
1867.50
1992.50
2117.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2167.50
2117.50
1992.50
1867.50
1752.50
1637.50
1522.50
1407.50
1292.50
1177.50
1062.50
947.50
832.50
4
tenx technology, inc.
Rev 1.3
03/12/01
TM8705
PIN DESCRIPTION
Name
BAK
VDD1,2,3
I/O
P
P
Description
Positive Back-up voltage.
At Li power mode, connect a 0.1u capacitor to GND.
LCD supply voltage, and positive supply voltage.
.In Ag Mode, connect positive power to VDD1.
.In Li or ExtV power mode, connect positive power to VDD2.
Input pin for external reset request signal, built-in internal pull-down resistor.
Input pin for external INT request signal.
. Falling edge or rising edge triggered is defined by mask option.
. Internal pull-down or pull-up resistor is defined by mask option.
Test signal input pin.
Switching pins for supply the LCD driving voltage to the VDD1, 2, 3 pins.
. Connect the CUP1 and CUP2 pins with non-polarized electrolytic capacitors when
chip operated in 1/2 or 1/3 bias mode.
. In no BIAS mode application, leave these pins opened.
Time base counter frequency (clock specified. LCD alternating frequency. Alarm signal
frequency) or system clock oscillation.
. The usage of 32KHz Crystal oscillator or external RC oscillator is defined by mask
option.
System clock oscillation for FAST clock only or DUAL clock operation.
. The usage of 3.58MHz ceramic/resonator oscillator or external R type oscillator is
defined by mask option
Output pins for driving the common pins of the LCD panel.
COM5~6 could be defined as COMS or Open Drain type output.
Output pins for driving the LCD panel segment.
Input / Output port A, (muxed with SEG24~27)
Input / Output port B, (muxed with SEG28~31)
Input / Output port C, (muxed with SEG32~35)
Input / Output port D, (muxed with SEG36~39)
1 input pin and 3 output pins for RFC application. (muxed with SEG24~27)
Output port for El panel driver. (muxed with SEG28~29)
Output port for alarm, clock or single tone melody generator. (muxed with SEG30~31)
Output port for key matrix scanning.(Shared with SEG1~SEG16)
Input port for key matrix scanning.(Muxed with SEG32~SEG35)
Negative supply voltage.
RESET
INT
I
I
TEST
CUP1,2
O
XIN
XOUT
I
O
CFIN
CFOUT
COM1~6
SEG1-40
IOA1-4
IOB1-4
IOC1-4
IOD1~4
CX
RR/RT/RH
ELC/ELP
BZB/BZ
K1~16
KI1~4
GND
I
O
O
O
I/O
I/O
I/O
I/O
I
O
O
O
O
I
P
5
tenx technology, inc.
Rev 1.3
03/12/01
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