5962-02A0201VXC datasheet, PDF

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5962-02A0201VXC: DescriptionSerial I/O Controller, 3 Channel(s), 25MBps, CMOS, PQFP100, CERAMIC, MQFP-100; CategoryThe embedded processor and controller Microcontrollers and processors; File Size548KB，43 Pages; Manufacturere2v technologies

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5962-02A0201VXC Overview

Serial I/O Controller, 3 Channel(s), 25MBps, CMOS, PQFP100, CERAMIC, MQFP-100

5962-02A0201VXC Parametric

Parameter Name	Attribute value
Parts packaging code	QFP
package instruction	QFF,
Contacts	100
Reach Compliance Code	compliant
Address bus width
boundary scan	YES
maximum clock frequency	5 MHz
Maximum data transfer rate	25 MBps
External data bus width	16
JESD-30 code	S-PQFP-F100
length	19.05 mm
low power mode	NO
Number of serial I/Os	3
Number of terminals	100
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QFF
Package shape	SQUARE
Package form	FLATPACK
Certification status	Not Qualified
Maximum seat height	2.67 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	0.635 mm
Terminal location	QUAD
width	19.05 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches	1

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Features

•

Besides the serial IEEE-1355 link, the T7906E provides several different interface

types:

– Host interface

The host interface provides 8 multiplexed data and address lines to program

and control the T7906E locally

– FIFO interface

The FIFO interface provides the control signals FULL, WRITE, EMPTY and READ

depending on the direction of the data flow (receive / transmit)

– ADC interface

The ADC interface allows to connect an ADC with a width of up to 16 bits directly

to the T7906E

– DAC interface

The DAC interface provides up to 16 bits data lines and the required control

signals. The data to be sent to the DAC are stored until a command “start DAC”

is received

– RAM interface

The RAM interface provides a 16-bit data bus and a 16-bit address bus. Four

chip select allow to address 4 different memory partitions. The memory interface

can be programmed to use up to 7 wait states

– UART interface

Two independent UART interfaces are included. One UART uses dedicated I/O

lines whereas the second UART is sharing its pins with the GPIO port

– General purpose I/O

This general Purpose Interface provides up to 24 bidirectional signal lines. The

direction of each GPIO line can be set individually via register

– Timer / Event Counter

Two 32-Bit on-chip timers are available. Each timer provides a 32-Bit counter

and a 32-Bit reload register. The two timers can be operated independently or

cascaded

– JTAG (IEEE 1149.1)

For testing purposes, a standard IEEE 1149.1 interface is provided. It supports

the JTAG function Bypass, Extest, Sample/preload, All-tristate and IDCode

•

Designed on Atmel MG1090E sea of gates matrix and packaged into MQFPF100

•

A user’s manual of the T7906E (also called SMCS Lite or SMCS116) is available at:

http://www.spacewire.esa.int/tech/spacewire/products/index.htm

Single Point to

Point IEEE 1355

High Speed

Controller

T7906E

Description

The T7906E provides one IEEE-1355 serial communication link with 0 to 200 Mbit/s

data transmit rate. It supports both the standard IEEE-1355 link protocol (transparent

mode) as well as the header generation required for the enhanced transaction layer of

the TSS901E. This protocol uses specific protocol headers that can be generated by

the T7906E without requiring an external host controller. These headers are stored in

specific header registers which allows headers with a length of 0 (equaling the trans-

parent mode) to eight bytes per packet. Packetization of data sent by the T7906E over

the link is also done automatically according to the settings of a packet length register.

Another feature provided by the transaction layer supported by the T7906E is an auto-

matic checksum generation on the link. This is generated and checked automatically

by the T7906E without requiring support from a host or other external source. Errors

on the link are flagged and a special error packet is sent over the link to signal the

error condition.

4166D–AERO–04/07

Programming the T7906E internal registers is done via the IEEE-1355 link. All internal registers

are 8-bit wide addressable. Two simple commands (read and write) suffice to access all func-

tions and registers of the T7906E.

The interfaces of the T7906E such as the FIFO, UART, ADC/DAC and memory interface are

accessed by a simple read or write operation to the corresponding interface address. In the case

of FIFO, Host, UART and memory interface, a packet oriented access is also possible (meaning

transferring multiple bytes with a single command). In case a communication memory

is connected to the T7906E, this can be read and written to via the link specific registers.

The IEEE-1355 links can support a range of communication speeds, which are programmed by

writing to registers. At reset all links are configured to run at the base speed of 10 Mbits/sec.

Only the transmission speed of a link is programmed as reception is asynchronous. This means

that links running at different speeds can be connected, provided that each device is capable of

receiving at the speed of the connected transmitter.

Introduction

Connecting a non-intelligent node to a processing element requires not only the communication

controller, but usually a controlling instance for the communication circuitry. The latter has to be

configured for settings like bit rate, packet sizes, handshake protocols etc. Should the non-intel-

ligent node require remote control via commands, usually a second link, dedicated for

commands is introduced. Using an IEEE-1355 link for that purpose eliminates the need for sep-

arate data and control paths, since the communication controller can differentiate between the

two entities. In addition, it can be remotely configured, can execute simple commands and pro-

vides special I/O pins to control the interface unit.

The T7906E provides one IEEE-1355 serial communication link together with additional features

to support non-intelligent nodes as well as to control ADC and DAC converters.

The T7906E is targeted at two main applications areas:

•

Embedded systems

Communication device for processor systems

Embedded Systems

The main application targets of the T7906E are modules and units without any built-in communi-

cation features, such as special image compression chips, application specific programmable

logic or mass memory. The T7906E is perfectly suited to be used on "non-intelligent" modules

such as A/D-converter or sensor interfaces, due to its "control by link" feature and system control

facilities. In addition, its fault tolerance feature make the device very interesting for many critical

industrial measurement and control systems.

Example applications of the T7906E as communication and system controller on an interface

node consisting of an ADC and DAC and one where the T7906E is connected to four banks of

memory are given in the figures below:

T7906E

4166D–AERO–04/07

5962-02A0201VXC Related Products

	5962-02A0201VXC	5962-02A0201QXC
Description	Serial I/O Controller, 3 Channel(s), 25MBps, CMOS, PQFP100, CERAMIC, MQFP-100	Serial I/O Controller, 3 Channel(s), 25MBps, CMOS, PQFP100, CERAMIC, MQFP-100
Parts packaging code	QFP	QFP
package instruction	QFF,	QFF,
Contacts	100	100
Reach Compliance Code	compliant	compliant
boundary scan	YES	YES
maximum clock frequency	5 MHz	5 MHz
Maximum data transfer rate	25 MBps	25 MBps
External data bus width	16	16
JESD-30 code	S-PQFP-F100	S-PQFP-F100
length	19.05 mm	19.05 mm
low power mode	NO	NO
Number of serial I/Os	3	3
Number of terminals	100	100
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QFF	QFF
Package shape	SQUARE	SQUARE
Package form	FLATPACK	FLATPACK
Certification status	Not Qualified	Not Qualified
Maximum seat height	2.67 mm	2.67 mm
Maximum supply voltage	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal form	FLAT	FLAT
Terminal pitch	0.635 mm	0.635 mm
Terminal location	QUAD	QUAD
width	19.05 mm	19.05 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL	SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches	1	1

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