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IDT74FST3383SO

Description
Bus Exchanger, CBT/FST/QS/5C/B Series, 2-Func, 4-Bit, True Output, CMOS, PDSO24, SOIC-24
Categorylogic    logic   
File Size117KB,5 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT74FST3383SO Overview

Bus Exchanger, CBT/FST/QS/5C/B Series, 2-Func, 4-Bit, True Output, CMOS, PDSO24, SOIC-24

IDT74FST3383SO Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionSOP, SOP24,.4
Contacts24
Reach Compliance Codenot_compliant
Other featuresTTL COMPATIBLE BUS SWITCH
seriesCBT/FST/QS/5C/B
JESD-30 codeR-PDSO-G24
JESD-609 codee0
length15.4 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS EXCHANGER
Humidity sensitivity level1
Number of digits4
Number of functions2
Number of ports4
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP24,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
power supply5 V
propagation delay (tpd)0.25 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width7.5 mm
Base Number Matches1
IDT74FST3383
OCTAL BUS EXCHANGE SWITCH
COMMERCIAL TEMPERATURE RANGE
OCTAL BUS EXCHANGE
SWITCH
IDT74FST3383
FEATURES:
Bus switches provide zero delay paths
Extended commercial range of –40°C to +85°C
Low switch on-resistance: 5Ω
TTL-compatible input and output levels
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Available in QSOP, TSSOP, SOIC, and PDIP Packages
DESCRIPTION:
The FST3383 belongs to IDT's family of Bus Switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
generate little or no noise of their own while providing a low resistance path
for an external driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this FET is
adequately forward-biased the device conducts and the resistance be-
tween input and output ports is small. Without adequate bias on the gate-
to-source junction of the FET, the FET is turned off, therefore with no V
CC
applied, the device has hot insertion capability.
The low on-resistance and simplicity of the connection between input
and output ports reduces the delay in this path to close to zero.
The FST3383 provides four 5-bit TTL-compatible ports that support 2
way bus exchange. The BX pin controls the bus exchange and the
BE
pin
serves as the enable pin.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
BE
C
0
A
0
1
2
3
4
5
6
7
8
9
10
11
12
P24-1
SO24-2
SO24-8
SO24-9
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
D
4
B
4
A
4
C
4
D
3
B
3
A
3
C
3
D
2
B
2
BX
A
0
C
0
B
0
D
0
B
0
D
0
C
1
A
4
C
4
A
1
B
1
B
4
D
4
D
1
C
2
B
X
BE
A
2
GND
PDIP/ SOIC/ QSOP/ TSSOP
TOP VIEW
COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-5525/-
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