HCS14K/SAMPLE datasheet, PDF - EEWORLD Datasheet

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HCS14K/SAMPLE: DescriptionHC/UH SERIES, HEX 1-INPUT INVERT GATE, CDFP14; Categorylogic logic; File Size160KB，8 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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HCS14K/SAMPLE Overview

HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDFP14

HCS14K/SAMPLE Parametric

Parameter Name	Attribute value
Maker	Renesas Electronics Corporation
Parts packaging code	DFP
package instruction	DFP,
Contacts	14
Reach Compliance Code	unknown
series	HC/UH
JESD-30 code	R-CDFP-F14
length	9.525 mm
Logic integrated circuit type	INVERTER
Number of functions	6
Number of entries	1
Number of terminals	14
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP
Package shape	RECTANGULAR
Package form	FLATPACK
propagation delay (tpd)	22 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
width	6.285 mm
Base Number Matches	1

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HCS14MS

August 1995

Radiation Hardened

HEX Inverting Schmitt Trigger

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T14

TOP VIEW

A1 1

Y1 2

A2 3

Y2 4

A3 5

Y3 6

GND 7

14 VCC

13 A6

12 Y6

11 A5

10 Y5

9 A4

8 Y4

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD(Si)

• SEP Effective LET No Upsets: >100 MEV-cm

/mg

• Single Event Upset (SEU) Immunity < 2 x 10

-9

Errors/Bit-Day

(Typ)

• Dose Rate Survivability: >1 x 10

Rads (Si)/s

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55

C to +125

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

≤

5µA at VOL, VOH

14 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP3-F14

TOP VIEW

GND

VCC

Description

The Intersil HCS14MS is a Radiation Hardened HEX Inverting

Schmitt trigger. A high on any input forces the output to a Low

state.

The HCS14MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS14MS is supplied in a 14 lead Ceramic ﬂatpack Package

(K sufﬁx) or a 14 lead SBDIP Package (D sufﬁx).

TRUTH TABLE

INPUTS

OUTPUTS

Ordering Information

PART

NUMBER

HCS14DMSR

TEMPERATURE

RANGE

-55 C to +125 C

SCREENING

LEVEL

Intersil Class

S Equivalent

Intersil Class

S Equivalent

Sample

PACKAGE

14 Lead SBDIP

NOTE: L = Logic Level Low,

H = Logic level High

14 Lead Ceramic

Flatpack

14 Lead SBDIP

HCS14KMSR

-55

C to +125

HCS14D/

Sample

HCS14K/

Sample

HCS14HMSR

+25

Functional Diagram

+25

Sample

14 Lead Ceramic

Flatpack

Die

+25

Die

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Spec Number

File Number

518752

3049.1

DB NA

HCS14K/SAMPLE Related Products

	HCS14K/SAMPLE	HCS14D/SAMPLE
Description	HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDFP14	HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation
Parts packaging code	DFP	DIP
package instruction	DFP,	DIP,
Contacts	14	14
Reach Compliance Code	unknown	unknown
series	HC/UH	HC/UH
JESD-30 code	R-CDFP-F14	R-CDIP-T14
length	9.525 mm	19.43 mm
Logic integrated circuit type	INVERTER	INVERTER
Number of functions	6	6
Number of entries	1	1
Number of terminals	14	14
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP	DIP
Package shape	RECTANGULAR	RECTANGULAR
Package form	FLATPACK	IN-LINE
propagation delay (tpd)	22 ns	22 ns
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	YES	NO
technology	CMOS	CMOS
Terminal form	FLAT	THROUGH-HOLE
Terminal pitch	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL
width	6.285 mm	7.62 mm
Base Number Matches	1	1

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