74V2T14
TRIPLE SCHMITT INVERTER
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 5.0ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1µA(MAX.) at T
A
= 25°C
TYPICAL HYSTERESIS:
V
h
=700mV at V
CC
=4.5V
POWER DOWN PROTECTION ON INPUT
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T14STR
DESCRIPTION
The 74V2T14 is an advanced high-speed CMOS
TRIPLE SCHMITT INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface 5V to 3V. Pin configuration and function
are the same as those of the 74V2T04 but the
74V2T14 has hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
The input is equipped with protection circuits
against static discharge, giving it ESD immunity
and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/7
74V2T14
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 3, 6
7, 5, 2
4
8
SYMBOL
1A, 2A, 3A
1Y, 2Y, 3Y
GND
V
CC
NAME QND FUNCTION
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
H
Y
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
Storage Temperature
T
stg
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Parameter
Value
4.5 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
Unit
V
V
V
°C
2/7
74V2T14
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
4.5
4.5
4.5
0 to
5.5
5.5
5.5
I
O
=-50
µA
I
O
=-8 mA
I
O
=50
µA
I
O
=8 mA
V
I
= 5.5V or GND
V
I
= V
CC
or GND
One Input at 3.4V,
other input at V
CC
or GND
T
A
= 25°C
Min.
0.9
1.1
0.5
0.6
0.4
0.5
4.4
3.94
0.0
0.1
0.36
±
0.1
1
1.35
Typ.
Max.
2.0
2.0
1.5
1.6
1.4
1.6
4.5
Value
-40 to 85°C
Min.
0.9
1.1
0.5
0.6
0.4
0.5
4.4
3.8
0.1
0.44
±
1.0
10
1.5
Max.
2.0
2.0
1.5
1.6
1.4
1.6
-55 to 125°C
Min.
0.9
1.1
0.5
0.6
0.4
0.5
4.4
3.7
0.1
0.55
±
1.0
20
1.5
µA
µA
mA
V
Max.
2.0
2.0
1.5
1.6
1.4
1.6
V
V
V
V
Unit
V
t+
V
t-
V
h
V
OH
V
OL
I
I
I
CC
I
CC
High Level
Threshold Voltage
Low Level
Threshold Voltage
Hysteresis Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
Additional Worst
Case Supply
Current
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
5.0 (*)
5.0 (*)
C
L
(pF)
15
50
T
A
= 25°C
Min.
Typ.
5.0
6.5
Max.
7.5
8.5
Value
-40 to 85°C
Min.
1.0
1.0
Max.
9.0
10.0
-55 to 125°C
Min.
1.0
1.0
Max.
10.5
11.5
ns
Unit
(*) Voltage range is 5.0V
±
0.5V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
Min.
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
T
A
= 25°C
Typ.
4
14
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
Unit
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/3
+
t
PLH
t
PHL
Propagation Delay
Time
3/7
74V2T14
TEST CIRCUIT
C
L
= 15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAY
(f=1MHz; 50% duty cycle)
4/7
Embedded System
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