AN-994-1
Rev. 2.0
MAXIMIZING THE
EFFECTIVENESS OF YOUR SMD
ASSEMBLIES
Gil Alivio
John Ambrus
Tim McDonald
Richard Dowling
2 of 7
IR Application Note –994 (Rev. 2)
Title: Maximizing the Effectiveness of Your SMD
1
Assemblies
Topics Covered:
•
Section I: How we Measure R
th (JA)
•
Section II: Thermal Characterization of
Surface Mount Packages
•
Section III: Attachment to board
•
Section IV: Solder Pastes
•
Section V: Heat Profiles
•
Section VI: Rework
Thermal Resistance was measured according to
industry practice by first performing a reference
temperature estimate; a temperature sensitive
electrical parameter (TSEP) such as Vsd is measured
and compared with a calibration value to determine Tj.
Then a heating pulse of known power is applied
followed by a second TSEP measurement. That
measurement was compared to a calibration table to
estimate junction temperature and calculate the
temperature rise due to the heating pulse. From the
familiar equation:
∆T
= R
TH
X P
D
Section I: How we measure R
th (JA)
Herein is described the device mounting and heat
sinking used and the test methods employed to
measure Thermal Resistance of the various packages.
Standard printed circuit boards were developed to
which devices were solder-mounted for measuring
thermal resistance. FR-4 material with 2 oz. Cu was
used. Board dimension were 4.75 inches by 4.5 inches
and backside of board had full metal pattern. Three
different PCB metallization patterns
were tested: one with 1 sq inch of Cu area, the second
one
with Cu trace minimized so as to cover only as much
area
as taken up by the Device Under Test (DUT) and
necessary lead mounting pads (described as “modified
minimum pattern”), and the last one is the “absolute
minimum” pattern with the metallized area sized only
as needed to mount each lead. (See the figure 1.)
And where:
∆T
= T
J
- T
Ref
Temperature difference (C) between
junction temperature and reference temperature (here
ambient, case temperature or package lead),
R
TH
= Thermal Resistance (C/W) between junction and
reference point (again ambient, case temperature or
package lead),
P
D
= Power dissipated (W)
We can calculate the thermal resistance by plugging in
the measured values of temperature rise and power. In
this way measurements were taken on representative
samples of all packages listed in the table below.
(equation 1)
Dut placed in the
middle of this pad
for Modified Minimum
Pattern Area Measurements
Dut placed in the
middle of this pad
for Minimum Pattern
Area Measurements
Dut placed in the
middle of this pad
for 1 Square Inch
Pattern Area Measurements
Board size 4.5 inches by 4.75 inches
Copper layer on the back
Figure 1.
1 This application note applies only to surface mountable type devices. Through-hole
devices such as TO-220, TO-247, Fulpak, etc are excluded and not covered by this note.
3 of 7
Section II: Thermal Characterization of Surface
Mount Packages
Table 1 shows typical and Maximum R
th (JA)
and typical
R
th (JL)
values of the SMD packages presently offered
by International Rectifier. For R
th (JC)
values, please
refer to the appropriate data sheet.
Measurements are provided for devices mounted on
three different PCB patterns: 1 square inch (“1 sq”),
modified minimum area, and minimum area, as
described graphically in Figure 1.
Based on the Max R
th (JA)
values in Table 1 please see
in Figures 2-4 the graphs of power dissipation vs.
ambient temperature for each type of PCB pattern.
Note that generally the larger packages with exposed
heat sinks (D2-Pak, D-Pak & SOT-223) have the
highest Power Dissipation capabilities.
Note also that the larger the metallized PCB pattern
area, the lower will be the thermal resistance.
Measurements at 3 different PCB pattern Areas reflect
this sensitivity.
Package type
u-3
TSOP6 (Dual)
TSSOP8
u-6
u-8
TSOP6 (Single)
SO-8 (Dual)
SOT-223
Sm
all-can DirectFET
SO-8
M
id-can DirectFET
D-Pak
D2-Pak
1sq"
Typ R
th(JA)
M R
th(JA)
ax
R
th
(Sam Size 3 pc/package type)
ple
M
odified M um
inim
M um
inim
Typ R
th(JA)
M R
th(JA)
ax
Typ R
th(JA)
M R
th(JA)
ax
Typ R
th(JL)
*
169.2
73.4
60.9
47.1
39.9
47.3
54.5
27.2
32.1
33.5
32.3
20.2
18.0
230.0
125.0
83.0
75.0
70.0
62.5
62.5
60.0
58.0
50.0
45.0
26.3
23.3
237.1
134.7
106.4
112.5
102.4
112.0
73.1
49.0
49.2
66.3
55.6
42.0
33.6
308.2
175.1
138.3
146.3
133.2
145.6
95.1
63.7
64.0
86.2
72.3
54.6
43.7
263.6
170.7
117.0
124.9
126.1
118.5
94.7
66.1
68.1
70.6
62.2
59.5
36.7
342.6
222.0
152.1
162.4
163.9
154.0
123.1
86.0
88.5
91.8
80.9
77.3
47.7
139.3
35.5
35.5
14.7
17.0
17.0
28.7
4.9
NA
10.6
NA
2.0
1.6
Table 1:
R
th
typical and max values for various SMD packages
.
NOTES:
1. * The R
th (JL)
& the R
th (JA)
1sq" were measured at the same time. R
th
reference to drain lead.
2. See Section I for details of measurement conditions.
3. The PCB contributes greatly to the total R
th.
If PCB material properties or dimensions vary significantly
from those used by IR, actual R
th (actual)
results may also vary.
4 of 7
Figure 2: Mod Min Power Dissipation (T_ambient)
Power Dissipation vs. Ambient Temperature Modified
Minimum PCB footprint
3.50
D2-Pak **
3.00
Power Dissipation(W)
D-Pak **
SOT-223
small-can DirectFET **
2.50
2.00
1.50
1.00
0.50
0.00
0
25
50
75
100
125
150
175
mid-can DirectFET **
SO-8
SO-8 (Dual)
u-8
TSSOP8
TSOP6 (Single)
u-6
TSOP6 (Dual)
u-3
T_ambient(°C)
Figure 3: 1 sq" Power Dissipation (T ambient)
Power Dissipation vs. Ambient Temperature
1"square Cu area on PCB
6.00
D2-Pak **
D-Pak **
mid-can DirectFET **
Power Disspation(W)
5.00
4.00
3.00
2.00
SO-8
small-can DirectFET **
SOT-223
SO-8 (Dual)
TSOP6 (Single)
1.00
0.00
0
25
50
75
100
125
150
175
u-8
u-6
TSSOP8
TSOP6 (Dual)
u-3
T_ambient(°C)
5 of 7
Figure 4: Absolute Min Power Dissipation (T ambient)
Power Dissipation vs. Ambient Temperature
Absolute Minimum PCB footprint
3.00
D2-Pak **
D-Pak **
mid-can DirectFET **
Power Dissipation(W)
2.50
2.00
1.50
1.00
SOT-223
small-can DirectFET **
SO-8
SO-8 (Dual)
TSSOP8
0.50
0.00
0
25
50
75
100
125
150
175
TSOP6 (Single)
u-6
u-8
TSOP6 (Dual)
u-3
T_ambient(°C)
Section III: Attachment to board:
Most designers and technicians in the electronic industry are
familiar with printed circuits that are provided with holes to
support leaded components during the soldering process.
Surface mount components on the other hand are by
definition leadless and rely on the strength of the solder joint
alone for mechanical as well as electrical connection. Many
PCB assemblies require the mounting of devices on both
sides of the board. The reflow process is typically performed
once. Both sides of the board are pasted at the same time.
Components are then placed on the topside only. An
adhesive is then applied to the topside to hold the
components in place. The board is then inverted 180
degrees and the second side is populated with components.
At that point the populated board is ready for the thermal
process that will melt the solder paste and attach the
components to the board. After the mounting process is
complete the adhesive serves no further purpose.
The adhesives used must provide sufficient tenacity to
prevent component movement during handling and soldering.
At the same time, the adhesive should provide a bond that
can be broken with minimal disturbance to the populated
board in order to replace incorrect components before
soldering. It must also be capable of maintaining adhesion
during the preheat cycle and it should not become a deterrent
to solder flow during the reflow or wave soldering process.
Typical adhesives of this type are made from non-activated
resins (R), which can be used in forming gas atmosphere to
reduce oxides. Some are mildly activated resin (RMA), which
can be used in normal factory environment. The activation in
this case is used to reduce small amounts of oxidation of the
solderable surfaces and the solder particles in the paste.
Section IV: Solder Pastes:
There are a wide variety of solder pastes available for
surface mounting applications. Typical solder pastes
are composed of a homogeneous mixture of pre
alloyed solder powder with a specific grain size.
Fluxes are also provided in the solder paste mixture as
a necessary component of the surface mounting
process.
In today’s densely populated assemblies, pin spacing
of SMD components has significantly been reduced.
Pin spacing of less than 0.4mm is common which
poses problem such as solder bridging, insufficient
solder on the lead and device placement accuracy.
Solder stencil thickness, dimension and registration
accuracy, solder paste composition and particle size
are all critical to successful soldering of these
assemblies.
With the advanced state of the art of fine pitch device
technology, a simple guideline for the choice of solder
paste is outside the scope of this document. The
customer should seek expert guidance from the solder
paste vendor and PCB board fabricator for detailed,
application specific recommendations.
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