5962-8415001VFA datasheet, PDF

5962-8415001VFA: DescriptionDual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CFP -55 to 125; Categorylogic logic; File Size852KB，19 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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5962-8415001VFA Overview

Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-CFP -55 to 125

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DFP
package instruction	DFP, FL16,.3
Contacts	16
Reach Compliance Code	not_compliant
Factory Lead Time	1 week
Other features	DUMMY VAL
series	HC
JESD-30 code	R-GDFP-F16
length	10.3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	J-KBAR FLIP-FLOP
Maximum Frequency@Nom-Sup	4000000 Hz
MaximumI(ol)	-0.004 A
Number of digits	2
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Encapsulate equivalent code	FL16,.3
Package shape	RECTANGULAR
Package form	FLATPACK
method of packing	TUBE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
Maximum supply current (ICC)	0.04 mA
Prop。Delay @ Nom-Sup	58 ns
propagation delay (tpd)	250 ns
Certification status	Qualified
Schmitt trigger	No
Filter level	MIL-PRF-38535 Class V
Maximum seat height	2.03 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	6.73 mm
minfmax	25 MHz
Base Number Matches	1

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