CD4085BF3A datasheet, PDF - EEWORLD Datasheet

CD4085BF3A: DescriptionCMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125; Categorylogic logic; File Size1MB，17 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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CD4085BF3A Overview

CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125

Parameter Name	Attribute value
Brand Name	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	not_compliant
ECCN code	EAR99
Factory Lead Time	6 weeks
Other features	EXPANDABLE
series	4000/14000/40000
JESD-30 code	R-GDIP-T14
length	19.56 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND-OR-INVERT GATE
MaximumI(ol)	0.0015 A
Number of functions	2
Number of entries	4
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
method of packing	TUBE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5/15 V
Maximum supply current (ICC)	0.6 mA
Prop。Delay @ Nom-Sup	620 ns
propagation delay (tpd)	620 ns
Certification status	Not Qualified
Schmitt trigger	NO
Filter level	38535Q/M;38534H;883B
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	18 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.67 mm
Base Number Matches	1

	CD4085BF3A	CD4085BF	CD4085B-MIL	CD4085B
Description	CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125	CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125	CD4085B-MIL CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate	CD4085B CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate

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