P
RODUCT
S
PECIFICATIONS
®
Integrated Circuits Group
LH28F160BJHE-TTL90
Flash Memory
16M (1M × 16/2M × 8)
(Model No.: LHF16J04)
Spec No.: EL11X036
Issue Date: November 11, 1999
SliARP
LHF16504
l Handle this document carefully for it contains material protected by international copyright law.
Any reproduction, full or in part, of this material is prohibited without the express written
permission of the company.
l When using the products covered herein, please observe the conditions written herein and the
precautions outlined in the following paragraphs. In no event shall the company be liable for any
damages resulting from failure to strictly adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following application
areas. When using the products covered herein for the equipment listed in Paragraph (2),
even for the following application areas, be sure to observe the precautions given in
Paragraph (2). Never use the products for the equipment listed in Paragraph (3).
*Office electronics
aInstrumentation and measuring equipment
@Machinetools
*Audiovisual equipment
*Home appliance
l Com’munication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following equipment which
demands hiuh reliabilitv, should first contact a sales representative of the company and then
accept responsibility for incorporatin, 0 into the design fail-safe operation, redundancy, and
other appropriate measures for ensuring reliability and safety of the equipment and the
overall system.
@Control and safety devices for airplanes, trains, automobiles, and other
transportation equipment
*Mainframe computers
@Traffic control systems
*Gas leak detectors and automatic cutoff devices
*Rescue and security equipment’
aOther safety devices and safety equipment, etc.
(3) Do not use the products covered herein for the following equipment which demands
extremely high oerformance in terms of functionality, reliability, or accuracy.
aAerospace equipment
*Communications equipment for trunk lines
*Control equipment for the nuclear power industry
*Medical equipment related to life support, etc.
(4) Please direct all queries and comments regardin, 0 the interpretation of the above three
Paragraphs to a sales representative of the company.
l Please direct all queries regardin,0 the products covered herein to a sales representative of the
company.
Rev. 1.15
SHARP
LHFl6504
1
CONTENTS
PAGE
INTRODUCTION..
............................................................ 3
5 DESIGN CONSIDERATIONS
PAGE
....................................... 25
1.1 Features ........................................................................ 3
1.2 Product Overview.. ....................................................... 3
1.3 Product Description.. ................................................... .4
1.3.1 Package Pinout ...................................................... .4
1.3.2 Block Organization.. ............................................... 4
PRINCIPLES OF OPERATION.. ...................................... 7
2.1 Data Protection.. .......................................................... .8
BUS OPERATION ............................................................ 8
3.1 Read .............................................................................. 8
3.2 Output Disable .............................................................. 8
3.3 Standby.. ....................................................................... 8
3.4 Reset ............................................................................. 8
3.5 Read Identifier Codes.. ................................................ .9
3.6 Write.. .......................................................................... .9
COMMAND
DEFINITIONS
............................................. 9
5.1 Three-Line Output Control ........................................ 25
5.2 RY/BY# and WSM Polling ....................................... 25
5.3 Power Supply Decoupling ......................................... 25
5.4 Vccw Trace on Printed Circuit Boards ..................... 25
5.5 v,, . vccw.
RP# Transitions .................................... 25
Protection.. ..................................... 26
5.6 Power-Up/Down
5.7 Power Dissipation ...................................................... 26
5.8 Data Protection Method ............................................. 26
6 ELECTRICAL
SPECIFICATIONS
................................ 27
6.1 Absolute Maximum Ratings.. .................................... 27
6.2 Operating Conditions ................................................. 27
6.2.1 Capacitance .......................................................... 27
6.2.2 AC Input/Output Test Conditions.. ...................... 28
6.2.3 DC Characteristics ............................................... 29
6.2.4 AC Characteristics - Read-Only Operations.. ...... 31
6.2.5 AC Characteristics - Write Operations ................ 34
6.2.6 Alternative CE#-Controlled Writes ...................... 36
6.2.7 Reset Operations .................................................. 38
6.2.8 Block Erase. Full Chip Erase, Word/Byte Write and
Lock-Bit Configuration Performance ................. 39
7 PACKAGE
AND PACKING SPECIFICATIONS
.......... 40
4.1 Read Array Command.. .............................................. 12
4.2 Read Identifier Codes Command ............................... 12
4.3 Read Status Register Command.. ............................... 12
4.4 Clear Status Register Command.. ............................... 12
4.5 Block Erase Command.. ............................................. 13
4.6 Full Chip Erase Command ......................................... 13
4.7 Word/Byte Write Command.. ..................................... 13
4.8 Block Erase Suspend Command ................................ I4
4.9 Word/Byte Write Suspend Command.. ...................... 14
4.10 Set Block and Permanent Lock-Bit Command.. ....... I5
4.1 1 Clear Block Lock-Bits Command ............................ 15
4.12 Block Locking by the WP# ...................................... 16
Rev. 1.25
LI-IFI 6504
2
LH28F 160BJHE-TTL90
IGM-BIT ( 1Mbit x16 / 2Mbit
x8
)
Boot Block Flash MEMORY
n
n
n
n
I
Low Voltage Operation
- v,,=v(-cw-L.
-’ 7V-3.6V Single Voltage
User-Configurable
High-Performance
-
H
x8 or x 16 Operation
Read Access Time
n
-
-
Enhanced Automated Suspend Options
-
Word/Byte Write Suspend to Read
Block Erase Suspend to Word/Byte Write
Block Erase Suspend to Read
90ns(Vcc=2.7V-3.6V)
Enhanced Data Protection Features
-
Absolute Protection with VCCWIVCCWLK
-
-
-
Block Erase, Full Chip Erase, Word/Byte Write and
Lock-Bit Configuration Lockout during Power
Transitions
Block Locking with Command and WP#
Permanent Locking
Operating Temperature
- -40°C to
+85”C
Low Power Management
-
Typ. 2uA (V,,=3,OV) Standby Current
Automatic Power Savings Mode Decreases ICCR in
Static Mode
Typ. 120pA (V,,=3.OV, T,=+25”C. f=32kHz)
Read Current
-
-
n
Automated Block Erase, Full Chip Erase,
Word/Byte Write and Lock-Bit Configuration
-
Command User Interface (CUB
-
Status Register (SR)
n
-
-
-
Optimized Array Blocking Architecture
-
Two 4K-word (8K-byte) Boot Blocks
Six 4K-word (8K-byte) Parameter Blocks
Thirty-one 32K-word (64K-byte) Main Blocks
Top Boot Location
n
n
n
SRAM-Compatible
Industry-Standard
-
G-Lead TSOP
ETOXTkt*
Write Interface
Packaging
Flash Technology
Nonvolatile
n
Extended Cycling Capability
-
Minimum 100,000 Block Erase Cycles
W CMOS
w
Process (P-type silicon substrate)
hardened
Not designed or rated as radiation
iHARP’s LH28F160BJHE-TTL90
vide range of applications.
Flash memory is a high-density. low-cost. nonvolatile, read/write storage solution for a
,H28F160BJHE-TTL90
can operate at V,,=2.7V-3.6V
and Vc-w--. -3 TV-3.6V or 11.7V-12.3V. Its low voltage operation
:apability realize battery life and suits for cellular phone application.
ts Boot, Parameter and Main-blocked architecture, low voltage and extended cycling provide for highly flexible component
uitable for portable terminals and personal computers. Its enhanced suspend capabilities provide for an ideal solution for code
- data storage applications.
:or secure code storage applications, such as networking, where code is either directly executed out of flash or downloaded to
IRAM, the LH28F160BJHE-TTL90
offers four levels of protection: absolute protection with VccwlVc-wLK,
selective
oive
lardware block locking or flexible software block locking. These alternatives Z designers ultimate control of their code
ecurity needs.
he LH28F160BJHE-‘ITL90
is manufactured on SHARP’s 0.25pm ETOXT”*
tandard package: the 4%lead TSOP, ideal for board constrained applications.
ETOX is a trademark of Intel Corporation.
process technology. It come in industry-
Rev. 1.25
SHARP
LHF16504
3
1
1 INTRODUCTION
This
datasheet
LH28F160BJHE-T-IL90
contains
specifications. Section 1 provides a flash memory
overview. Sections 2. 3. 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
A block erase operation erases one of the device’s 32K-
word/6JK-byte blocks typically within 1.2s (3V Vcc. 3V
blocks typically within 0.6s (3V
V ccw). JK-word/8K-byte
V,,. 3V Vccw) independent of other blocks. Each block
can be independently erased minimum 100,000 times.
Block erase suspend mode allows system software to
suspend block erase to read or write data from any other
block.
Writing memory data is performed in word/byte
increments of the device’s 32K-word blocks typically
within 33~s (3V V,,. 3V Vccw). 6JK-byte blocks
typically within 31~s (3V V,,. 3V Vccw). 4K-word
blocks typically within 36~s (3V Vcc. 3V V,,,),
8K-
byte blocks typically within 32~s (3V Vcc. 3V Vccw).
Word/byte write suspend mode enables the system to read
data or execute code from any other flash memory array
location.
Individual block locking uses a combination of bits, thirty-
nine block lock-bits. a permanent lock-bit and WP# pin. to
lock and unlock blocks. Block lock-bits gate block erase.
full chip erase and word/byte write operations. while the
permanent lock-bit pates block lock-bit modification and
locked
block
alternation.
Lock-bit
configuration
operations (Set Block Lock-Bit, Set Permanent Lock-Bit
and Clear Block Lock-Bits commands) set and cleared
lock-bits.
The status register indicates when the WSM‘s block erase,
fuli chip erase. word/byte write or lock-bit configuration
operation is finished.
The RY/BY# output gives an additional indicator of WSM
activity by providing both a hardware signal of status
(versus software polling) and status masking (interrupt
masking for background block erase, for example). Status
polling using RY/BY# minimizes both CPU overhead and
system power consumption. When low, RY/BY# indicates
that the WSM is performing a block erase. full chip erase.
word/byte write or lock-bit configuration. RY/BY#-high Z
indicates that the WSIM is ready for a new command.
block erase is suspended (and word/byte write is
inactive), word/byte write is suspended. or the device is in
reset mode.
1.1 Features
Key enhancements of LH28F16OBJHE-TTL90
Flash memory are:
Gingle low voltage operation
*Low power consumption
*Enhanced Suspend Capabilities
l Boot Block Architecture
Please note following:
boot block
l
VCCWLK
has been lowered to l.OV to support 2.7V-
3.6V block erase. full chip erase. word/byte write and
lock-bit configuration operations. The Vccw voltage
transitions to GND is recommended for designs that
switch Vccw off during read operation.
1.2 Product Overview
The LH28F160BJHE-TTL90 is a high-performance 16M-
ait Boot Block Flash memory organized as lM-word of 16
aits or 2M-byte of 8 bits. The lM-word/2M-byte
of data is
u-ranged in two 4K-word/SK-byte
boot blocks, six 4K-
word/8K-byte parameter blocks and thirty-one 32K-
vord/64K-byte
main blocks which are individually
:rasable, lockable and unlockable in-system. The memory
nap is shown in Figure 3.
Ihe dedicated V ccw pin gives complete data protection
vhen V CCW’VCCWLK.
4 Command User Interface (CUD serves as the interface
jetween the system processor and internal operation of the
ievice. A valid command sequence written to the CUI
nitiates device automation. An internal Write State
vlachine (WSM) automatically executes the algorithms
md timings necessary for block erase, full chip erase.
vord/byte write and lock-bit configuration operations.
Rev. 1.25
京公网安备 11010802033920号
EEWORLD
