Standard SRAM, 128KX8, 25ns, CMOS, CQCC32, LCC-32
| Parameter Name | Attribute value |
| package instruction | QCCN, |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Maximum access time | 25 ns |
| JESD-30 code | R-CQCC-N32 |
| length | 21.082 mm |
| memory density | 1048576 bit |
| Memory IC Type | STANDARD SRAM |
| memory width | 8 |
| Number of functions | 1 |
| Number of terminals | 32 |
| word count | 131072 words |
| character code | 128000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 128KX8 |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | QCCN |
| Package shape | RECTANGULAR |
| Package form | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| Certification status | Qualified |
| Filter level | MIL-STD-883 |
| Maximum seat height | 2.4384 mm |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal form | NO LEAD |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| Base Number Matches | 1 |
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