LCX037BLT
3.4cm (1.35 Type) Black-and-White LCD Panel
Description
The LCX037BLT is a 3.4cm diagonal active matrix
TFT-LCD panel addressed by polycrystalline silicon
super thin film transistors with a built-in peripheral
driving circuit. Use of three LCX037BLT panels
provides a full-color representation. The striped
arrangement suitable for data display is capable of
displaying fine text and vertical lines.
The adoption of a new developed dot-line inverse
drive system, CMP (Chemical Mechanical Polish)
and OCS (On Chip Spacer) structures contribute to
high picture quality.
This panel has a polysilicon TFT high-speed
scanner and built-in function to display images
up/down and/or right/left inverse. The built-in 5V
interface circuit leads to lower voltage of timing and
control signals.
Features
•
Number of active dots: 1,049,088 (1.35 Type, 3.4cm in diagonal)
•
High optical transmittance: 16% (typ.)
•
Dot-line inverse drive circuit
•
OCS structure
•
CMP (Chemical Mechanical Polish) structure
•
High contrast ratio with normally white mode: 300 (typ.)
•
Built-in H and V drivers (built-in input level conversion circuit, 5V driving possible)
•
Up/down and/or right/left inverse display function
•
Antidust glass package
Element Structure
•
Dots: 1366 (H)
×
768 (V) = 1,049,088
•
Built-in peripheral driver using polycrystalline silicon super thin film transistors
Applications
•
Liquid crystal data projectors
•
Liquid crystal multimedia projectors
•
Liquid crystal rear-projector TVs, etc.
∗
The company's name and product's name in this data sheet is a trademark or a registered trademark of each company.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E00231-PS
COM
PAD
34
Block Diagram
COM
PAD
VCOM
SOUT
VV
DD
V
SS
PST
DWN
VST
VCK
ENB
Input Signal
Level Shifter
Circuit
Up/Down and/or Right/Left
Inversion Control Circuit
V Shift Register
33 32 31 30 29 28 27 26
25
24
23 22 21 20
19
COML
V
SS
HCK2
HCK1
HST
RGT
HV
DD
H Shift Register
P Shift Register
–2–
V Shift Register
COM
PAD
SIG12
SIG11
SIG10
SIG9
SIG8
SIG7
SIG6
SIG5
SIG4
SIG3
8
7
6
5
4
3
2
1
18 17 16 15 14 13 12 11 10 9
SIG2
SIG1
COMR
PSIG4
PSIG3
PSIG2
PSIG1
V
SS
G
COM
PAD
LCX037BLT
LCX037BLT
Absolute Maximum Ratings
(V
SS
= 0V)
•
H driver supply voltage
HV
DD
•
V driver supply voltage
VV
DD
•
Common pad voltage
COM, COML, COMR
•
H shift register input pin voltage HST, HCK1, HCK2,
RGT
•
V shift register input pin voltage VST, VCK, PST,
•
Video signal input pin voltage
•
Operating temperature
∗
ENB, DWN
SIG1 to 12, PSIG1 to 4
Topr
–1.0 to +20
–1.0 to +20
–1.0 to +17
–1.0 to +17
–1.0 to +17
–1.0 to +15
–10 to +70
–30 to +85
V
V
V
V
V
V
°C
°C
•
Storage temperature
Tstg
∗
Panel temperature inside the antidust glass
Operating Conditions
(V
SS
= 0V)
•
Supply voltage
HV
DD
VV
DD
15.5 ± 0.3V
15.5 ± 0.3V
•
Input pulse voltage (Vp-p of all input pins except video signal and uniformity improvement signal)
Vin
5.0 ± 0.5V
–3–
LCX037BLT
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Symbol
V
SS
G
PSIG1
PSIG2
PSIG3
PSIG4
COMR
SIG1
SIG2
SIG3
SIG4
SIG5
SIG6
SIG7
SIG8
SIG9
SIG10
SIG11
SIG12
HV
DD
RGT
HST
HCK1
HCK2
V
SS
COML
ENB
VCK
VST
DWN
PST
V
SS
VV
DD
SOUT
VCOM
GND for V gate
Uniformity improvement signal (for black)
Uniformity improvement signal (for black)
Uniformity improvement signal (for gray)
Uniformity improvement signal (for gray)
Voltage for right CS (Storage capacity) electrode line
Video signal 1 to panel
Video signal 2 to panel
Video signal 3 to panel
Video signal 4 to panel
Video signal 5 to panel
Video signal 6 to panel
Video signal 7 to panel
Video signal 8 to panel
Video signal 9 to panel
Video signal 10 to panel
Video signal 11 to panel
Video signal 12 to panel
Power supply for H driver
Drive direction pulse for H shift register (H: normal, L: reverse)
Start pulse for H shift register drive
Clock pulse for H shift register drive 1
Clock pulse for H shift register drive 2
GND (H, V, drivers)
Voltage for left CS (storage capacity) electrode line
Enable pulse for gate selection
Clock pulse for V shift register drive
Start pulse for V shift register drive
Drive direction pulse for V shift register (H: normal, L: reverse)
Start pulse for P shift register drive
GND (H, V, P drivers)
Power supply for V, P drivers
Test pin; leave this pin open.
Common voltage of panel
–4–
Description
LCX037BLT
Input Equivalent Circuit
To prevent static charges, protective diodes are provided for each pin except the power supplies. In addition,
protective resistors are added to all pins except the video signal inputs. All pins are connected to V
SS
with a
high resistor of 1MΩ (typ.). The equivalent circuit of each input pin is shown below: (Resistance value: typ.)
(1) VSIG1 to VSIG12, PSIG
HV
DD
Input
1MΩ
(2) HCK1, HCK2
HV
DD
250Ω
Input
250Ω
1MΩ
250Ω
Signal line
Level conversion circuit
(2-phase input)
250Ω
1MΩ
Level conversion circuit
(2-phase input)
(3) RGT
HV
DD
2.5kΩ
Input
1MΩ
2.5kΩ
Level conversion circuit
(single-phase input)
(4) HST
HV
DD
250Ω
Input
1MΩ
250Ω
Level conversion circuit
(single-phase input)
(5) PST, VCK
VV
DD
250Ω
Input
1MΩ
250Ω
Level conversion circuit
(single-phase input)
(6) VST, ENB, DWN
VV
DD
2.5kΩ
Input
1MΩ
2.5kΩ
Level conversion circuit
(single-phase input)
(7) VCOM, COML, COMR
VV
DD
Input
1MΩ
LC
(8) HV
DD
, V
SS
G, VV
DD
Input
1MΩ
are all Vss.
–5–
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