Math Coprocessor, CMOS, CPGA68, PGA, 68 PIN
| Parameter Name | Attribute value |
| Parts packaging code | PGA |
| package instruction | , |
| Contacts | 68 |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| JESD-30 code | S-CPGA-P68 |
| JESD-609 code | e0 |
| Number of terminals | 68 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| Package shape | SQUARE |
| Package form | GRID ARRAY |
| Certification status | Not Qualified |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | TIN LEAD |
| Terminal form | PIN/PEG |
| Terminal location | PERPENDICULAR |
| uPs/uCs/peripheral integrated circuit type | MATH PROCESSOR, COPROCESSOR |
| Base Number Matches | 1 |
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