Ordering number : EN5682
CMOS LSI
LC7972VA, 7972VB
CMOS Operational Amplifier with Programmable
Offset Correction Function
Overview
The LC7972VA and LC7972VB are dual
inverting/noninverting operational amplifier ICs that are
fabricated in a CMOS process. These ICs provide a
programmable offset correction function and a power
saving function for use when the operational amplifier is
unused, both of which can be controlled from a
microprocessor interface.
• The following modes are supported. These are selected
via port level settings.
Package Dimensions
unit: mm
3179A-SSOP20
[LC7972VA, VB]
Features
• High input impedance provided by fabrication in a
CMOS process.
• Low power provided by fabrication in a CMOS process.
• One of two types of operational amplifier can be
selected: inverting (operational amplifier 1) or
noninverting (operational amplifier 2)
• Operating supply voltage: 4.9 to 5.2 V
• Package: SSOP20
• Operating temperature: Ta = –30 to +70°C
Port
OP1ON
Level
L
H
L
OP2ON
H
L
OFST1
H
L
OFST2
CLKC
H
L
Function
Operational amplifier 1: Operation stopped (low-power mode)
Operational amplifier 1: Normal operation (OP2ON must be low in this mode.)
Operational amplifier 2: Operation stopped (low-power mode)
Operational amplifier 2: Normal operation (OP1ON must be low in this mode.)
Operational amplifier 1: Offset mode (inverting input = V
SS
)
Operational amplifier 1: Operating mode (inverting input = normal input)
Operational amplifier 2: Offset mode (noninverting input = V
SS
)
Operational amplifier 2: Operating mode (noninverting input = normal input)
Operational amplifier power supply clock: Internal clock
SANYO: SSOP20
s
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
s
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
s
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of July, 1997. Specifications and information herein are subject to change
without notice.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
73097HA(OT) No. 5682-1/4
LC7972VA, 7972VB
Pin Assignment
Pin Functions
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
DV
DD
EXT
CLKC
OP2ON
OFST2
OP1ON
OFST1
TGO
OP1I
OP1O
OP2O
OP2I
TGI
AV
SS
M
AV
DD
AV
SS
P
AV
SS
CUP2
CUP1
DV
SS
Function
Digital system power supply. Normally connected to +5 V.
Must be tied low.
Must be tied low.
Operational amplifier 2 operation control
Operational amplifier 2 mode control
Operational amplifier 1 operation control
Operational amplifier 1 mode control
Operational amplifier 1 VSS/small voltage output
Operational amplifier 1 input
Operational amplifier 1 output
Operational amplifier 2 output
Operational amplifier 2 input
Small voltage input common to operational amplifiers 1 and 2
Operational amplifier power supply minus voltage generation
Analog system power supply. Normally connected to +5 V.
Operational amplifier power supply external Zener diode connection
Analog system ground. Must be connected to 0 V.
Operational amplifier power supply external capacitor connection 2
Operational amplifier power supply external capacitor connection 1
Digital system ground. Must be connected to 0 V.
No. 5682-2/4
LC7972VA, 7972VB
System Block Diagram and Sample Application
A circuit that amplifies very small voltages around the V
SS
level can be constructed by adding the peripheral circuits
shown in the figure below.
Step-down
voltage
converter circuit
Small-voltage input
A/D converter inputs
Microcontroller
Port outputs
No. 5682-3/4
LC7972VA, 7972VB
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Output voltage
Symbol
V
DD
max
V
O
V
I
1
V
I
2
Peak output current
Average output current
Allowable power dissipation
Operating temperature
Storage temperature
I
OP
I
OA
Pd max
Topr
Tstg
V
DD
OP1O, OP2O, TGO
OP1ON, OFST1, OP2ON, OFST2, EXT, CLKC, CUP2,
CUP1, AV
SS
P, OP1I, OP2I, TGI
AV
SS
M
OP1O, OP2O, TGO
OP1O, OP2O, TGO : The current per pin
SSOP20 : Ta = –30 to +70°C
Conditions
Ratings
–0.3 to +7.0
–0.3 to V
DD
+0.3
–0.3 to V
DD
+0.3
–3 to +0.3
–1 to +1
–1 to +1
100
–30 to +70
–55 to +125
Unit
V
V
V
V
mA
mA
mW
°C
°C
Input voltage
Allowable Operating Ranges
at Ta = –30 to +70°C, V
SS
= 0 V, V
DD
= 4.9 to 5.2 V, unless otherwise specified
Parameter
Supply voltage
Input high-level voltage
Input low-level voltage
Common-mode input voltage
Voltage drop
Symbol
V
DD
V
IH
V
IL
1
V
IL
2
V
IC
D
V
AV
SS
M: Zener diode = 5.1 V (X rank specified)
V
DD
OP1ON, OFST1, OP2ON, OFST2
OP1ON, OFST1, OP2ON, OFST2, CLKC
EXT
Conditions
Ratings
min
4.9
0.7 V
DD
V
SS
V
SS
0
–0.2
typ
max
5.2
V
DD
0.3 V
DD
0.3 V
DD
4.2
Unit
V
V
V
V
V
V
Electrical Characteristics
at Ta = –30 to +70°C, V
SS
= 0 V, V
DD
= 4.9 to 5.2 V, unless otherwise specified
Parameter
Symbol
I
IH
1
I
IH
2
I
IL
1
I
IL
2
Output high-level voltage
Output low-level voltage
Operational amplifier 1 gain-related resistance
Operational amplifier 1 gain-related resistance
difference
Current drain
Operating
Standby
I
DDOP
I
DDST
V
DD
; Using the internal clock, with the
operational amplifier 1 circuit operating.
V
DD
; Both operational amplifiers 1 and 2
stopped.
700
0.05
900
10
µA
µA
V
OH
V
OL
Conditions
OP1ON, OFST1, OP2ON, OFST2 : V
IN
= V
DD
TGI: V
IN
= V
DD
, with the built-in TG off.
OP1ON, OFST1, OP2ON, OFST2, EXT,
CLKC : V
IN
= V
SS
TGI: V
IN
= V
SS
, with the built-in TG off.
OP1O, OP2O : I
OH
= –3 µA
OP1O, OP2O : I
OL
= 3 µA
500
700
TGO, TGI: Offset mode: Rx = Rtg + 2Rs
Operating mode: Ry = Rtg + 2Rs
–1.0
–1.0
V
DD
– 0.5
0.5
900
80
Ratings
min
typ
max
1.0
1.0
Unit
µA
µA
µA
µA
V
V
Ω
Ω
Input high-level current
Input low-level current
Rtg + 2Rs TGO, TGI
|Rx–Ry|
Operational Amplifier Characteristics
at Ta = 25°C ±2°C, V
SS
= 0 V, V
DD
= 4.9 to 5.2 V, unless otherwise specified
Parameter
Symbol
Conditions
OP1I, OP2I : LC7972VA
Input offset voltage
Supply voltage rejection ratio
Common-mode rejection ratio
Open-loop voltage gain
0-dB bandwidth
Maximum output voltage
Current drain
Settling time
V
IO
P
SRR
C
MRR
A
O
f
T
V
O
I
CC
T
SET
OP1O, OP2O : R
L
≥
100 kΩ
For the operational amplifier 1 circuit
OP1O, OP2O
1 kHz
LC7972VB
Ratings
min
typ
5
5
60
60
80
90
V
DD
– 0.5
100
900
max
10.5
15
Unit
mV
mV
dB
dB
dB
kHz
V
µA
µs
No. 5682-4/4
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