Ordering number : EN4922C
CMOS LSI
LC72146, 72146M
PLL Frequency Synthesizer
for Electronic Tuning
Overview
The LC72146 is a PLL frequency synthesizer LSI circuit
for electronic tuning in car stereo systems. The LC72146
supports the construction of high-performance, multi-
functional electronic tuning systems for the VHF MW,
and LW bands.
Package Dimensions
unit: mm
3067-DIP24S
[LC72146]
Features
• High-speed programmable dividers for
— 10 to 160 MHz on FMIN using pulse swallower
— 0.5 to 40.0 MHz on AMIN using pulse swallower
and direct division
• General-purpose counters
— HCTR for 0.4 to 25.0 MHz frequency measurement
— LCTR for 10 to 500 kHz frequency measurement
and 1.0 Hz to 20
×
10
3
kHz period measurement
• Reference frequencies: Twelve selectable reference
frequencies (4.5 or 7.2 MHz crystal) 1, 3, 5, 9, 10,
3.125, 6.25, 12.5, 25, 30, 50 and 100 kHz
• Phase comparator
— Insensitive band control
— Unlock detection
— Sub-charge pump for high-speed locking
— Deadlock clear circuit
• CCB input/output data interface
• Power-on reset circuit
• Built-in MOS transistor for a low-pass filter
• Inputs/outputs (using five general-purpose input/output
ports)
— Maximum of seven inputs (max)
— Maximum of seven outputs (max/four n-channel
open-drain and three CMOS outputs)
— Time-base output for clock (8 Hz)
• Operating ranges
— Supply voltage ..................................4.5 to 5.5 V
— Opetating temperature ......................–40 to 85°C
• Package
— DIP24S, MFP24S
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO: DIP24S
unit: mm
3112-MFP24S
[LC72146M]
SANYO: MFP24S
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
73096HA (OT)/11095TH (OT) No. 4922-1/21
LC72146, 72146M
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum supply voltage
Symbol
V
DD
max
V
IN
1 max
Maximum input voltage
V
IN
2 max
V
IN
3 max
V
O
1 max
Maximum output voltage
V
O
2 max
V
O
3 max
I
O
1 max
Maximum output current
I
O
2 max
I
O
3 max
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
V
DD
CE, CL, DI
XIN, FMIN, AIN, AMIN, HCTR/I-6, LCTR/I-7, I/O-4, I/O-5
I/O-1 to I/O-3
DO
XOUT, I/O-4, I/O-5, O-6, PD0, PF1, AIN
I/O-1 to I/O-3, AOUT, O-7
I/O-4, I/O-5, O-6, O-7
DO, AOUT
I/O-1 to I/O-3
DIP24S:Ta
≤
85°C
MFP24S:Ta
≤
85°C
Conditions
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
–0.3 to +15
–0.3 to +7.0
–0.3 to V
DD
+ 0.3
–0.3 to +15
0 to 3.0
0 to 6.0
0 to 10
350
220
–40 to +85
–55 to +125
Unit
V
V
V
V
V
V
V
mA
mA
mA
mW
mW
°C
°C
Allowable Operating Ranges
at Ta = –40 to 85°C, V
SS
= 0 V
Parameter
Supply voltage
Symbol
V
DD
1
V
DD
2
V
IH
1
V
IH
2
V
IL
1
V
IH
3
V
IL
2
V
O
1
V
O
2
f
IN
1
f
IN
2
Input frequency
f
IN
3
f
IN
4
f
IN
5
f
IN
6
Guaranteed oscillator
element frequencies
Xtal
V
IN
1
V
IN
2-1
V
IN
2-2
V
IN
3-1
V
IN
3-2
Input amplitude
V
IN
3-3
V
IN
3-4
V
IN
4-1
V
IN
4-2
V
IN
5-1
V
IN
5-2
V
IN
5-3
Data set up time
Data hold time
t
SU
t
HD
V
DD
V
DD
: Serial data retain voltage
CE, CL, DI, I/O-1 to I/O-3
I/O-4, I/O-5, HCTR/I-6 and LCTR/I-7
CE, CL, DI and I/O-1 to I/O-5, HCTR/I-6, LCTR/I-7
LCTR/I-7, Pulse wave
*1
LCTR/I-7, Pulse wave
*1
DO
I/O-1 to I/O-3, AOUT, O-7
XIN; Sine wave, capacitive coupling
FMIN; Sine wave, capacitive coupling
AMIN; Sine wave, capacitive coupling
HCTR/I-6; Sine wave, capacitive coupling
LCTR/I-7; Sine wave, capacitive coupling
LCTR/I-7; Pulse wave, DC coupling
*1
XIN, XOUT; CI
≤
120
Ω
XIN
FMIN; 50
≤
f < 130 MHz
*2
FMIN; 10
≤
f < 50 MHz
*2
, 130
≤
f 160 MHz
AMIN; 2
≤
f < 25 MHz
*2
AMIN; 25
≤
f < 40 MHz
*2
AMIN; 0.5
≤
f < 2.5 MHz
*2
AMIN; 2.5
≤
f < 10 MHz
*2
HCTR/I-6; 0.4
≤
f < 25 MHz
*3
HCTR/I-6; 8
≤
f < 12 MHz
*4
LCTR/I-7; 10
≤
f < 400 kHz
*3
LCTR/I-7; 400
≤
f < 500 kHz
*3
LCTR/I-7; 400
≤
f < 500 kHz
*4
DI, CL
*5
DI, CL
*5
Conditions
min
4.5
2.0
2.2
2.2
0
2.2
0
0
0
1.0
10
0.5
0.4
10
1.0
4.0
200
40
70
40
70
40
70
40
70
40
20
70
0.45
0.45
6.5
V
DD
0.8
V
DD
0.8
6.5
13
8.0
160
40
25
500
20
×
10
3
8.0
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
1500
typ
max
5.5
Unit
V
V
V
V
V
V
V
V
V
MHz
MHz
MHz
MHz
kHz
Hz
MHz
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
mVrms
µS
µS
Input high-level voltage
Input low-level voltage
Input high-leve lvoltage
Input low-level voltage
Output voltage
Continued on next page.
No. 4922-2/21
LC72146, 72146M
Continued from preceding page.
Parameter
Clock low-level time
Clock high-level time
CE wait time
CE setup time
CE hold time
Chip enable to data latch time
Data output time
Note: 1.
2.
3.
4.
5.
Symbol
t
CL
t
CH
t
EL
t
ES
t
EH
t
LC
t
DC
CL
*5
CL
*5
CE, CL
*5
CL, CE
*5
CE, CL
*5
*5
Conditions
min
0.45
0.45
0.45
0.45
0.45
typ
max
Unit
µs
µs
µs
µs
µs
0.45
0.2
µs
µs
DO, CL; Depends on pull-up resistor
Period measurement
See the description of the structure of the programmable divider.
With the CTC bit in the serial data set to 0
With the CTC bit in the serial data set to 1
See the description of the serial data timing.
Electrical Characteristics
at Ta = –40 to +85°C, V
SS
= 0 V
Parameter
Symbol
Rf1
Rf2
Internal feedback resistance
Rf3
Rf4
Rf5
Sub charge pump
internal resistance
Hysteresis
R1S
V
HIS
V
OH
1
V
OH
2
V
OL
1
V
OL
2
Output low-level voltage
V
OL
3
I/O-1 to I/O-3
XIN
FMIN
AMIN
HCTR/I-6
LCTR/I-7
AIN
CE, CL, DI, LCTR/I-7
I
O
= 0.5 mA
Output high-level voltage
PD0, PD1, I/O-4, I/O-5, O-6
I
O
= 1 mA
I
O
= 2 mA
AIN: I
O
= 1 mA
PD0, PD1, I/O-4,
I/O-5, O-6, O-7
AIN: I
O
= 1 mA
I
O
= 1 mA
I
O
= 2.5 mA
I
O
= 5 mA
I
O
= 9 mA
V
OL
4
V
OL
5
I
IH
1
I
IH
2
Input high-level current
I
IH
3
I
IH
4
I
IH
5
I
IH
6
I
IL
1
I
IL
2
Input low-level current
I
IL
3
I
IL
4
I
IL
5
I
IL
6
DO; I
O
= 5 mA
AOUT; I
O
= 1 mA, AIN = 1.3 V
CE, CL, DI; V
I
= 6.5 V
I/O-1 to I/O-3; V
I
= 13 V
I/O-4, I/O-5, HCTR/I-6, LCTR/I-7; V
I
= V
DD
XIN; V
I
= V
DD
FMIN, AMIN; V
I
= V
DD
HCTR/I-6, LCTR/I-7; V
I
= V
DD
CE, CL, DI; V
I
= 0 V
I/O-1 to I/O5; V
I
= 0 V
HCTR/I-6, LCTR/I-7; V
I
= 0 V
XIN; V
I
= 0 V
FMIN, AMIN; V
I
= 0 V
HCTR/I-6, LCTR/I-7; V
I
= 0 V
2.0
4.0
8.0
2.0
4.0
8.0
I
O
= 0.5 mA
I
O
= 1 mA
I
O
= 2 mA
0.3
V
DD
– 0.5
V
DD
– 1.0
V
DD
– 2.0
V
DD
– 0.6
V
DD
– 0.3
0.5
1.0
2.0
0.6
0.2
0.5
1.0
1.8
1.0
0.5
5.0
5.0
5.0
11
22
44
5.0
5.0
5.0
11
22
44
Conditions
min
typ
1.0
500
500
250
250
100
0.1 V
DD
max
Unit
mΩ
kΩ
kΩ
kΩ
kΩ
Ω
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
Continued on next page.
No. 4922-3/21
LC72146, 72146M
Continued from preceding page.
Parameter
Output off leakage current
High-level three state
off leakage current
Lowh-level three state
off leakage current
Input cacitance
Pull-down transistor
on resistance
Symbol
I
OFF
1
I
OFF
2
I
OFFH
I
OFFL
C
IN
R
pd
1
R
pd
2
I
DD
1
Supply current
I
DD
2
I
DD
3
Conditions
I/O-1 to I/O3, AOUT, O-7; V
O
= 13 V
DO; V
O
= 6.5 V
PD0, PD1, AIN; V
O
= V
DD
PD0, PD1, AIN; V
O
= 0 V
FMIN
FMIN
AMIN
V
DD
; Xtal = 7.2 MHz, f
IN
2 = 160 MHz,
V
IN
2 = 70 mVrms, f
IN
4 = 25 MHz
V
IN
4 = 40 mVrms
V
DD
; PLL inhibited,
crystal oscillator running (Xtal = 7.2 MHz)
V
DD
; PLL inhibited, crystal oscillator stoped
10
µA
0.5
1.5
mA
10
15
mA
80
80
0.01
min
typ
max
5.0
5.0
200
Unit
µA
µA
nA
0.01
6
200
200
200
nA
pF
600
600
kΩ
kΩ
Pin Assignment
Block Diagram
No. 4922-4/21
LC72146, 72146M
Pin Functions
Number
Symbol
Type
Function
Equivalent circuit
24
1
XIN
XOUT
Xtal OSC
Connection for crystal oscillator element (7.2 or 4.5 MHz)
17
FMIN
Local oscillator
signal input
• Serial data input: FMIN is selected when DVS is set to 1.
Input frequency range: 10 to 160 MHz
• The signal is transmitted directly to the swallow counter
• Divisor value range: 272 to 65535
16
AMIN
Local oscillator
signal input
•
•
•
•
•
•
•
•
Serial data input: AMIN is selected when DVS is set to 0.
Serial data input: when SNS is set to 1.
Input frequency range: 2 to 40 MHz
The signal is transmitted directly to the swallow counter.
Divisor value range: 272 to 65535
Serial data input: when SNS is set to 0.
Input frequency range: 0.5 to 10 MHz
The signal is transmitted directly to the 12-bit
programmable divider.
• Divisor value range: 4 to 4095
2
CE
Chip enable
• IThis pin must be set high to input serial data to the
LC72146 DI pin or to output serial data from the DO pin.
4
CL
Clock
• Inputs the clock used for data synchronization when
inputting serial data to the LC72146 DI pin or outputting
serial data from the DO pin.
3
DI
Input data
• Input pin for serial data transmitted to the LC72146 from
a controller.
5
DO
Output data
• Output pin for serial data transmitted from the LC72146 to
a controller.
15
V
DD
Power supply
• The LC72146 power supply connection. A voltage
between 4.5 and 5.5 volts must be supplied when the
PLL circuit is used.
• The power on reset circuit operates when power is first
applied.
18
23
V
DD
Ground
• The LC72146 ground connection.
12
11
10
I/O-1
I/O-2
I/O-3
General-purpose
I/O port
•
•
•
•
General-purpose I/O ports
Output mode circuit type: open drain
Function after a power on reset: input port
Can be set up to function as output ports by bits I/O-1 to
I/O-3 in the serial data sent from the controller.
Continued on next page.
No. 4922-5/21
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