VCA8617
SBOS308B − AUGUST 2004 − REVISED NOVEMBER 2004
8-Channel
VARIABLE GAIN AMPLIFIER
FEATURES
D
3V OPERATION
D
LOW INPUT NOISE: 1.0nV//Hz at f
IN
= 5MHz
D
EXTREMELY LOW POWER OPERATION:
D
100mW/CHANNEL
INTEGRATED LOW-PASS, 2-POLE FILTER
15MHz BANDWIDTH
D
D
D
D
D
INTEGRATED INPUT CLAMP DIODES
DIFFERENTIAL OUTPUT
INTEGRATED INPUT LNA
READABLE CONTROL REGISTERS
INTEGRATED CONTINUOUS WAVE (CW)
PROCESSOR
DESCRIPTION
The VCA8617 is an 8-channel variable gain amplifier
ideally suited to portable ultrasound applications.
Excellent dynamic performance enables use in
low-power, high-performance portable applications.
Each channel consists of a 20dB gain Low-Noise
pre-Amplifier (LNA) and a Variable Gain Amplifier
(VGA). The differential outputs of the LNA can be
switched through the 8x10 cross-point switch, which is
programmable through the serial interface input port.
The output of the LNA is fed directly into the VGA stage.
The VGA consists of two parts, a Voltage-Controlled
Attenuator (VCA) and a Programmable Gain Amplifier
(PGA). The gain and gain range of the PGA can be
digitally configured separately. The gain of the PGA can
vary between four discrete settings of 25dB, 30dB,
35dB, and 40dB. The VCA has four programmable
maximum attenuation settings: 29dB, 33dB, 36.5dB,
and 40dB. Also, the VCA can be continuously varied by
a control voltage from 0dB to a maximum of 29dB,
33dB, 36.5dB, and 40dB.
The output of the PGA feeds directly into an integrated
two-pole, low-pass filter.
D(0−3)
DATA
CLK
CS
Serial
Interface
•••
Analog
Control
+
OutP
(1)
OutN
(1)
•••
10x8
FIFO
CW Processor
CW(0−9)
LNAIN1
LNA
1
−
•••
Attenuator
PGA
2−
Pole
Filter
•••
V
LNA
+
LNAIN8
LNA
8
−
Attenuator
PGA
2−
Pole
Filter
OutP
(8)
OutN
(8)
Analog
Control
V
LNA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright
2004, Texas Instruments Incorporated
www.ti.com
•••
•••
VCA8617
SBOS308B − AUGUST 2004 − REVISED NOVEMBER 2004
www.ti.com
ABSOLUTE MAXIMUM RATINGS
(1)
+AVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
Analog Input . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to +AVDD + 0.3V
Logic Input . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3V to +AVDD + 0.3V
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Thermal Resistance, Junction-to-Ambient (qJA) . . . . . . . . . 66.6°C/W
Thermal Resistance, Junction-to-Case(qJC) . . . . . . . . . . . . . 4.3°C/W
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
PAG
SPECIFIED
TEMPERATURE
RANGE
−40°C to +85°C
PACKAGE
MARKING
VCA8617PAG
ORDERING
NUMBER
VCA8617PAGT
VCA8617PAGR
TRANSPORT
MEDIA, QUANTITY
Tape and Reel, 250
Tape and Reel, 1500
VCA8617
TQFP-64
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
2
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VCA8617
SBOS308B − AUGUST 2004 − REVISED NOVEMBER 2004
ELECTRICAL CHARACTERISTICS: AV
DD
= 3V
At TA = +25°C, load resistance = 1kΩ on each output to ground, unless otherwise noted. The input to the preamp (LNA) is single-ended;
pre-amp gain is fixed at +20dB, fIN= 2MHz, PG = 01, ATN = 00, and the output from the VCA is differential, unless otherwise noted.
VCA8617
PARAMETER
PREAMPLIFIER
Input Resistance
Input Capacitance
Input Bias Current
Maximum Input Voltage(1)
Input Voltage Noise (TGC)
Input Voltage Noise (CW)
Output Swing (Differential)
Bandwidth
Gain
ACCURACY
Gain Slope
Gain Error
Output Offset Voltage
GAIN CONTROL INTERFACE
Input Voltage (VCACNTRL) Range
Input Resistance
Response Time
POWER SUPPLY
Specified Operating Range
Power-Down Delay
Power-Up Delay
Power Dissipation (TGC Mode)
PROGRAMMABLE VGA AND LOW-PASS FILTER
−3dB Cutoff (low-pass)
−3dB Cutoff (high-pass)
Slew Rate
Output Impedance
Crosstalk
Output Common-Mode
Output Swing (Differential)(2)
3rd-Harmonic Distortion
2nd-Harmonic Distortion
Group Delay Variation
CONTINUOUS WAVE PROCESSOR
V/I Converter Transconductance
Common-Mode
Max Output Swing
LOGIC INPUTS
VIN LOW (input low voltage)
VIN HIGH (input high voltage)
Input Current
Input Pin Capacitance
Clock Input Frequency
(1) Under conditions when input signal is within linear range of LNA.
(2) Under conditions when signal is within linear range of output amplifier.
CONDITIONS
MIN
TYP
4.5
52
1
200
MAX
UNITS
kΩ
pF
nA
mVPP
nV/√Hz
nV/√Hz
V
MHz
dB
dB/V
fIN = 5MHz
fIN = 5MHz
1.05
1.15
2
100
20
0.2V − 1.7V, VCACNTRL
0.2V − 1.7V, VCACNTRL
Differential
18
1.7
0.65
0 to 20
1
dB
mV
V
MΩ
µs
40dB Gain Change, PG = 11
2.85
0.2
3.0
5
100
3.15
V
µs
µs
Operating All Channels
825
14.5
400
300
10
49
1.5
950
mW
MHz
kHz
V/µs
Ω
dB
V
2
−65
−60
±3
17
20
1.4
3.4
0
2.1
5
10k
25M
0.6
VDD
±1
23
−50
−50
VPP
dB
dB
ns
mA/V
V
mAPP
V
V
µA
pF
Hz
3
VCA8617
SBOS308B − AUGUST 2004 − REVISED NOVEMBER 2004
www.ti.com
V
CNTRL
AGND
AGND
AGND
AGND
50
AV
DD
AV
DD
CW0
CW2
CW4
CW6
CW8
64
IN6
AGND
IN5
AGND
DV
DD
DGND
D
OUT
CLK
D
IN
1
2
3
4
5
6
7
8
9
63
62
61
60
59
58
57
56
55
54
53
52
51
49
48 OUT8
47 OUT8
46 OUT7
45 OUT7
44 OUT6
43 OUT6
42 OUT5
V
REF
41 OUT5
40 OUT4
39 OUT4
38 OUT3
37 OUT3
36 OUT2
35 OUT2
34 OUT1
33 OUT1
32
V
DDR
VCA8617
CS 10
DGND 11
DV
DD
12
AGND 13
IN4 14
AGND 15
IN3 16
17
AGND
18
IN2
19
AGND
20
IN1
21
AV
DD
22
CW1
23
CW3
24
CW5
25
CW7
26
CW9
27
AGND
28
AV
DD
29
V
FIL
30
V
CM
31
GNDR
PIN DESCRIPTIONS
PIN
5, 12
2, 4, 13, 15, 17, 19, 27, 50, 54, 62, 64
1, 3, 14, 16, 18, 20, 61, 63
22−26, 55−59
51
29
30
24, 36, 38, 40, 42, 44, 46, 48
33, 35, 37, 39, 41, 43, 45, 47
52
9
10
8
7
21, 28, 53, 60
6, 11
49
32
31
DESIGNATOR
DVDD
AGND
IN(1−8)
CW(0−9)
VLNA
VFIL
VCM
OUT(1−8)
OUT(1−8)
VCNTRL
DIN
CS
CLK
DOUT
AVDD
DGND
VREF
VDDR
GNDR
DESCRIPTION
Digital supplies
Analog ground
Single-ended LNA inputs
Continuous wave outputs
Reference voltage for LNA−internally generated; requires external bypass cap
Reference voltage for Output Filter−internally generated; requires external bypass
cap
Common-mode voltage−internally generated; requires external bypass cap
Positive polarity PGA outputs
Negative polarity PGA outputs
Attenuator control input
Serial data input pin
Serial data chip select
Serial data input clock
Serial data output pin
Analog supplies
Digital ground
Reference voltage for attenuator−internally generated; requires external bypass cap
Reference power supply
Reference ground
4
V
LNA
IN7
IN8
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VCA8617
SBOS308B − AUGUST 2004 − REVISED NOVEMBER 2004
INPUT REGISTER BIT MAPS
Byte 1—Control Byte Register Map
BIT #
LSB
1
2
3
4
5
6
MSB
NAME
1
W/R
PWR
A0
A1
Mode
PG0
PG1
DESCRIPTION
Start bit; always a ‘1’—40-bit count down starts upon first ‘1’ after chip select.
1 = Write, 0 = Read—Read prevents latching of DATA only—Control register still latched.
Entire chip. Power Control—1 = Off. Otherwise, chip is on.
Attenuator control bit.
Attenuator control bit.
1 = TGC Control mode (CW powered down), 0 = Doppler mode (TGC powered down)
LSB of PGA Gain Control
MSB of PGA Gain Control
Byte 2—First Data Byte
BIT #
LSB
1
2
3
4
5
6
MSB
NAME
Data 1:0
Data 1:1
Data 1:2
Data 1:3
Data 2:0
Data 2:1
Data 2:2
Data 2:3
DESCRIPTION
Channel 1, LSB of Matrix Control
Channel 1, Matrix Control
Channel 1, Matrix Control
Channel 1, MSB of Matrix Control
Channel 2, LSB of Matrix Control
Channel 2, Matrix Control
Channel 2, Matrix Control
Channel 2, MSB of Matrix Control
Byte 3—Second Data Byte
BIT #
LSB
1
2
3
4
5
6
MSB
NAME
Data 3:0
Data 3:1
Data 3:2
Data 3:3
Data 4:0
Data 4:1
Data 4:2
Data 4:3
DESCRIPTION
Channel 3, LSB of Matrix Control
Channel 3, Matrix Control
Channel 3, Matrix Control
Channel 3, MSB of Matrix Control
Channel 4, LSB of Matrix Control
Channel 4, Matrix Control
Channel 4, Matrix Control
Channel 4, MSB of Matrix Control
Byte 4—Third Data Byte
BIT #
LSB
1
2
3
4
5
6
MSB
NAME
Data 5:0
Data 5:1
Data 5:2
Data 5:3
Data 6:0
Data 6:1
Data 6:2
Data 6:3
DESCRIPTION
Channel 5, LSB of Matrix Control
Channel 5, Matrix Control
Channel 5, Matrix Control
Channel 5, MSB of Matrix Control
Channel 6, LSB of Matrix Control
Channel 6, Matrix Control
Channel 6, Matrix Control
Channel 6, MSB of Matrix Control
Byte 5—Fourth Data Byte
BIT #
LSB
1
2
3
4
5
6
MSB
NAME
Data 7:0
Data 7:1
Data 7:2
Data 7:3
Data 8:0
Data 8:1
Data 8:2
Data 8:3
DESCRIPTION
Channel 7, LSB of Matrix Control
Channel 7, Matrix Control
Channel 7, Matrix Control
Channel 7, MSB of Matrix Control
Channel 8, LSB of Matrix Control
Channel 8, Matrix Control
Channel 8, Matrix Control
Channel 8, MSB of Matrix Control
5
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