The DG300B, DG303B family of monolithic CMOS switches
feature three switch configuration options (SPST, SPDT,
and DPST) for precision applications in communications,
instrumentation and process control, where low leakage
switching combined with low power consumption are
required.
Designed on the Vishay Siliconix PLUS-40 CMOS process,
these switches are latch-up proof, and are designed to block
up to 30 V peak-to-peak when off. An epitaxial layer prevents
latchup.
In the on condition the switches conduct equally well in both
directions (with no offset voltage) and minimize error
conditions with their low on-resistance.
Featuring low power consumption (3.5 mW typ.) these
switches are ideal for battery powered applications,
without sacrificing switching speed. Designed for
break-before-make switching action, these devices are
CMOS and quasi TTL compatible. Single supply operation is
allowed by connecting the V- rail to 0 V.
FEATURES
•
•
•
•
•
•
Analog signal range: ± 15 V
Fast switching - t
ON
: 150 ns
Low on-resistance - R
DS(on)
: 30
Single supply operation
Latch-up proof
CMOS compatible
BENEFITS
• Full rail-to-rail analog signal range
• Low signal error
• Low power dissipation
APPLICATIONS
• Low level switching circuits
• Programmable gain amplifiers
• Portable and battery powered systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG300B
Plastic DIP
DG301B
Plastic DIP
NC
D1
NC
S1
NC
IN 1
GND
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
V+
D2
NC
S2
NC
IN 2
V-
NC
D
1
NC
S
1
NC
IN
GND
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
V+
D
2
NC
S
2
NC
NC
V-
TRUTH TABLE
Logic
0
1
Logic “0”
0.8 V
Logic “1”
4
V
Switch
OFF
ON
TRUTH TABLE
Logic
0
1
Logic “0”
0.8 V
Logic “1”
4
V
SW
1
OFF
ON
SW
2
ON
OFF
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 71402
S11-0303-Rev. C, 28-Feb-11
www.vishay.com
1
DG300B, DG301B, DG302B, DG303B
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG302B
Plastic DIP
DG303B
Plastic DIP and SOIC
14
13
12
11
10
9
8
Top View
V+
S
4
D
4
D
2
S
2
IN
2
V-
NC
S
3
D
3
D
1
S
1
IN
1
GND
1
2
3
4
5
6
7
NC
S
3
D
3
D
1
S
1
IN
1
GND
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
V+
S
4
D
4
D
2
S
2
IN
2
V-
TRUTH TABLE
Logic
0
1
Logic “0”
0.8 V
Logic “1”
4
V
Switch
OFF
ON
TRUTH TABLE
Logic
0
1
Logic “0”
0.8 V
Logic “1”
4
V
SW
1
, SW
2
OFF
ON
SW
3
, SW
4
ON
OFF
ORDERING INFORMATION
Temp. Range
Standard Package
Standard Part Number
DG300BDJ
14-Pin Plastic DIP
- 40 °C to 85 °C
DG301BDJ
DG302BDJ
DG303BDJ
14-SOIC
DG303BDY
Lead (Pb)-free Part Number
DG300BDJ-E3
DG301BDJ-E3
DG302BDJ-E3
DG303BDJ-E3
DG303BDY-T1
DG303BDY-E3
DG303BDY-T1-E3
www.vishay.com
2
Document Number: 71402
S11-0303-Rev. C, 28-Feb-11
DG300B, DG301B, DG302B, DG303B
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
Parameter
Voltages Referenced V+ to V-
GND
Digital Inputs , V
S
, V
D
Current (Any Terminal)
Continuous Current, S or D (Pulsed at 1 ms, 10 % duty cycle max.)
Storage Temperature
Power Dissipation (Package)
b
14-Pin PlasticDIP
c
SOIC-14
d
a
Limit
44
25
(V-) - 2 to (V+) + 2
or 30 mA, whichever occurs first
30
100
- 65 to 150
470
600
Unit
V
mA
°C
mW
Notes:
a. Signals on S
X
, D
X
, or IN
X
exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6.5 mW/°C above 25 °C
d. Derate 7.6 mW/°C above 75 °C.
SCHEMATIC DIAGRAM
(Typical Channel)
V+
S
V-
V
IN
Level
Shift/
Drive
V+
GND
D
V-
Figure 1.
Document Number: 71402
S11-0303-Rev. C, 28-Feb-11
www.vishay.com
3
DG300B, DG301B, DG302B, DG303B
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V
V
IN
= 0.8 V or V
IN
= 4 V
f
Limits
- 40 °C to 85 °C
Temp.
b
Full
V
D
= ± 10 V, I
S
= - 10 mA
Room
Full
Room
Hot
Room
Hot
Room
Hot
Room
Full
Room
Full
Room
Full
Room
Room
Room
Room
Room
V
S
, V
D
= 0 V, f = 1 MHz
V
IN
= 0 V
V
IN
= 15 V
Room
Room
f = 1 MHz
Room
Room
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
Min.
d
- 15
30
-5
- 100
-5
- 100
-5
- 100
-1
± 0.1
± 0.1
± 0.1
Typ.
c
Max.
d
15
50
75
5
100
5
100
5
100
Unit
V
Parameter
Analog Switch
Analog Signal Range
e
Drain-Source On-Resistance
Source Off Leakage Current
Drain Off Leakage Current
Drain On Leakage Current
Digital Control
Input Current with
Input Voltage High
Input Current with
Input Voltage Low
Dynamic Characteristics
Turn-On Time
Turn-Off Time
Break-Before-Make Time
Charge Injection
Source Off Capacitance
Drain Off Capacitance
Channel-On Capacitance
Input Capacitance
Off Isolation
Crosstalk (Channel-to-Channel)
Power Supplies
Positive Supply Current
Negative Supply Current
Positive Supply Current
Negative Supply Current
Symbol
V
ANALOG
R
DS(on)
I
S(off)
V
S
= ± 14 V, V
D
= ± 14 V
I
D(off)
I
D(on)
V
S
= V
D
= ± 14 V
nA
V
IN
= 5 V
I
INH
V
IN
= 15 V
I
INL
t
ON
t
OFF
t
OPEN
Q
C
S(off)
C
D(off)
C
D(on)
C
in
OIRR
X
TALK
V
IN
= 0 V
- 0.001
0.001
1
µA
-1
- 0.001
see figure 2
DG301B, DG303B Only
figure 3
C
L
= 1 nF, R
gen
= 0
,
V
gen
= 0 V
figure 4
150
130
50
8
14
14
40
6
7
62
74
0.23
- 100
- 0.001
0.001
- 100
- 0.001
100
µA
1
dB
pF
pC
ns
V
IN
= 0 V, R
L
= 1 k
V
S
= 1 V
rms
, f = 500 kHz
I+
I-
I+
V
IN
= 4 V (one input)
all others = 0 V
mA
V
IN
= 0.8 V (all inputs)
I-
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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