Ordering number: EN 5189
Monolithic Linear IC
LA9230M/9231M
Analog Signal Processor (ASP)
for CD players
Overview
The LA9230M and LA9231M are analog signal processing and
servo control bipolar ICs designed for use in compact disc
players; a compact disc player can be configured by combining
these ICs, a CD-DSP such as the LC78620E, and a small
number of additional components. The differences between the
LA9230M and the LA9231M are that the LA9231M: (1) has a
focus search time that is four times faster; (2) has an additional
capacitor pin for focus search smoothing; (3) and can disable
output of the track-kick signal during EF balance adjustment.
Package Dimensions
unit : mm
3159-QIP64E
[LA9230M/9231M]
Functions
I/V amplifier, RF amplifier (with AGC), SLC, APC, FE, TE
(with VCA and auto-balance function), focus servo amplifier
(with offset cancellation function), tracking servo amplifier
(with offset cancellation function), spindle servo amplifier
(with gain switching function), sled servo amplifier (with off
function), focus detection (DRF, FZD), track detection (HFL,
TES), defect detection, and shock detection.
SANYO : QIP64E
Features
The following automatic adjustment functions are built in.
.
Focus offset auto cancel
.
Tracking offset auto cancel
.
EF balance auto adjustment
.
RF level AGC function
.
Tracking servo gain RF level following function
Specifications
Maximum Ratings
at Ta = 25 °C, Pins 22, 45 = GND
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
Vsup max
Pd max
Topr
Tstg
Conditions
Pin 56, 64
Ratings
7
350
–25 to +75
–40 to +150
Unit
V
mW
°C
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
92595HA(II) No.5189-1/20
LA9230M/9231M
Operating Conditions
at Pins 22, 45 = GND
Parameter
Recommended supply voltage
Operating supply voltage
Symbol
V
CC
V
CC
op
Conditions
Ratings
5
3.6 to 5.5
Unit
V
V
Operating Characteristics
at Ta = 25 °C, Pins 22, 45 = GND, V
CC
(pins 56, 64) = 5 V
Parameter
Current drain
Reference voltage
[Interface]
CE-Vth
CL-Vth
DAT-Vth
Maximum CL frequency
[RF amplifier]
RFSM no signal voltage
Minimum gain
[Focus amplifier]
FDO gain
FDO offset
Off time offset
Offset adjustment step
F search voltage H
F search voltage L
[Tracking amplifier]
TE gain MAX
TE gain MIN
TE−3 dB
TO gain
TGL offset
TGH offset
THLD offset
Off 1 offset
Off 2 offset
Offset adjustment step
Balance range H
Balance range L
TOFF-VTH
TGL-VTH
[PH]
No signal voltage
[BH]
No signal voltage
[DRF]
Detection voltage
Output voltage H
Output voltage L
[FZD]
Detection voltage 1
Detection voltage 2
Symbol
I
CCO
Vref
CEvth
CLvth
DATvth
CLmax
RFSMo
RFSM
G
min
FD
G
FDost
FDofost
FDstep
FSmax
FSmin
TE
G
max
TE
G
min
TEfc
TO
G
TGLost
TGHost
THLDost
OFF1ost
OFF2ost
TOstep
BAL-H
BAL-L
TOFFvth
TGLvth
PHo
BHo
DRFvth
DRF-H
DRF-L
FZD1
FZD2
FIN1, FIN2 : 1 MΩ-input, PH1 = 4 V
freq = 200 kHz, RFSM
FIN2 : 1 MΩ-input, FDO
Difference from reference voltage, servo on
Difference from reference voltage, servo off
FDO
FDO
FDO
f = 10 kHz, E: 1 MΩ-input, PH1 = 4 V
f = 10 kHz, E: 1 MΩ-input, PH1 = 1 V
E: 1 MΩ-input
TH
→
TO gain, THLD mode
Servo on, TGL = H, TO
TGL = L, difference from TGL offset, TO
THLD mode, difference from TGL offset, TO
TOFF = H
TOF2 off (IF)
TO
∆
gain E/F input, TB = 5 V
∆
gain E/F input, TB = 0 V
Conditions
V
CC
1 (pin 64) + V
CC
2 (pin 56)
VR
CE
CL
DAT
500
1.35
–14.0
1.60
–12.5
1.85
–11.0
min
22
2.3
typ
32
2.5
0.8
0.8
0.8
max
42
2.7
Unit
mA
V
V
V
V
kHz
V
dB
3.5
–170
–40
5.0
0
0
50
0.8
–0.8
6.5
+1.8
60
6.0
0
0
0
0
0
60
3.5
–3.5
2.5
2.5
–0.65
0.65
–0.35
4.9
0
+0.2
0
6.5
+170
+40
dB
mV
mV
V
V
V
dB
dB
kHz
dB
mV
mV
mV
mV
mV
mV
dB
dB
V
V
V
V
V
V
V
V
V
5.0
–0.5
4.0
–250
–50
–50
–50
–50
8.0
+4.0
8.0
+250
+50
+50
+50
+50
1.0
1.0
Difference from RFSM
Difference from RFSM
Difference from VR at RFSM
–0.85
0.45
–0.60
4.5
3.0
3.0
–0.45
0.85
–0.20
+0.5
FE, difference from VR
FE, difference from VR
0
Continued on next page.
No.5189 - 2/20
LA9230M/9231M
Continued from preceding page.
Parameter
[HFL]
Detection voltage
Output voltage H
Output voltage L
[TES]
Detection voltage LH
Detection voltage HL
Output voltage H
Output voltage L
[JP]
Output voltage H
Output voltage L
[Spindle amplifier]
Offset 12
Offset 8
Offset off
Output voltage H12
Output voltage L12
Output voltage H8
[Sled amplifier]
SLEQ offset
Offset SLD
Offset off
Off VTH
[SLC]
No signal voltage
[Shock]
No signal voltage
Detection voltage H
Detection voltage L
[DEF]
Detection voltage
Output voltage H
Output voltage L
[APC]
Reference voltage
Off voltage
Symbol
HFLvth
HFL-H
HFL-L
TES-LH
TES-HL
TES-H
TES-L
Conditions
Difference from VR at RFSM
min
–0.35
4.5
typ
–0.2
4.9
0
–0.10
0.10
4.9
0
max
–0.05
+0.5
–0.05
0.15
+0.5
Unit
V
V
V
V
V
V
TESI, difference from VR
TESI, difference from VR
–0.15
0.05
4.5
JP-H
JP-L
Difference from JP
+
= 0 V, JP
–
= 0 V at JP
+
= 0 V,
JP
–
= 5 V, TO
Difference from JP
+
= 0 V, JP
–
= 0 V at JP
+
= 5 V,
JP
–
= 0 V, TO
Difference from VR at SPD, 12 cm mode
Difference from VR at SPD, 8 cm mode
Difference from VR at SPD, OFF mode
Difference from offset-12, 12 cm mode
CV
+
= 5 V, CV
–
= 0 V
Difference from offset-12 , 12 cm mode
CV
+
= 0 V, CV
–
= 5 V
Difference from offset-8, 8 cm mode
CV
+
= 5 V, CV
–
= 0 V
Difference from TO at SLEQ
SLEQ = VR, difference from VR
Off mode
SLOF
SLC
SCI, difference from VR
SCI, difference from VR
SCI, difference from VR
Difference between LF2 voltage when RFSM =
3.5 V and DEF is detected and LF2 voltage when
RFSM = 3.5 V
0.35
–0.65
0.5
–0.5
0.65
–0.35
V
V
SPD12ost
SPD8ost
SPDof
SPD-H12
SPD-L12
SPD-H8
–40
–40
–30
0.75
–1.25
0.35
0
0
0
1.0
–1.0
0.5
+40
+40
+30
1.25
–0.75
0.65
mV
mV
mV
V
V
V
SLEQost
SLDost
SLDof
SLOFvth
SLCo
SCIo
SCIvthH
SCIvthL
–30
–100
–40
1.0
2.25
–40
60
–140
0
0
0
1.4
2.5
0
100
–100
+30
+100
+40
2.0
2.75
+40
140
–60
mV
mV
mV
V
V
mV
mV
mV
DEFvth
DEF-H
DEF-L
LDS
LDDof
0.20
4.5
0.35
4.9
0
180
4.3
0.50
V
V
V
mV
V
+0.5
210
4.6
LDS voltage at which LDD = 3 V
LDD
150
3.9
No.5189 - 3/20
LA9230M/9231M
Pin Function
Descriptions enclosed in brackets apply to the LA9231M only.
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Symbol
FIN2
FIN1
E
F
TB
TE
−
TE
TESI
SCI
TH
TA
TD
−
TD
JP
TO
FD
FD
−
FA
FA
−
FE
FE
−
AGND
SP
SPI
SPG
SP
−
SPD
SLEQ
SLD
SL
−
SL
+
JP
−
JP
+
TGL
TOFF
TES
HFL
SLOF
CV
−
CV
+
RFSM
RFS
−
SLC
SLI
DGND
NC
[FSC]
NC
NC
DEF
CLK
CL
Contents
Pickup photodiode connection pin. Added to FIN1 pin to generate the RF signal, subtracted from FIN1 pin to generate
the FE signal.
Pickup photodiode connection pin.
Pickup photodiode connection pin. Subtracted from F pin to generate the TE signal.
Pickup photodiode connection pin.
TE signal DC component input pin.
Pin which connects the TE signal gain setting resistor between this pin and TE pin.
TE signal output pin.
TES (Track Error Sense) comparator input pin. The TE signal is input through a bandpass filter.
Shock detection input pin.
Tracking gain time constant setting pin.
TA amplifier output pin.
Pin for configuring the tracking phase compensation constant between the TD and VR pins.
Tracking phase compensation setting pin.
Tracking jump signal (kick pulse) amplitude setting pin.
Tracking control signal output pin.
Focusing control signal output pin.
Pin for configuring the focusing phase compensation constant between the FD and FA pins.
Pin for configuring the focusing phase compensation constant between the FD
−
and FA
−
pins.
Pin for configuring the focusing phase compensation constant between the FA and FE pins.
FE signal output pin.
Pin which connects the FE signal gain setting resistor between this pin and FE pin.
Analog signal GND.
CV
+
and CV
−
pins input signal single-end output.
Spindle amplifier input.
12-cm spindle mode gain setting resistor connection pin.
Spindle phase compensation constant connection pin, along with the SPD pin.
Spindle control signal output pin.
Sled phase compensation constant connection pin.
Sled control signal output pin.
Input pin for sled movement signal from microprocessor.
Input pin for sled movement signal from microprocessor.
Input pin for tracking jump signal from DSP.
Input pin for tracking jump signal from DSP.
Input pin for tracking gain control signal from DSP. Gain is low when TGL is high.
Input pin for tracking off control signal from DSP. Tracking servo is off when TOFF is high.
Output pin for TES signal to DSP.
The High Frequency Level is used to determine whether the main beam is positioned over a bit or over the mirrored
surface.
Sled servo off control input pin
Input pin for CLV error signal from DSP.
Input pin for CLV error signal from DSP.
RF output pin.
RF gain setting and EFM signal 3T compensation constant setting pin, along with the RFSM pin.
Slice Level Control is an output pin that controls the data slice level used by the DSP for the RF waveform.
Input pin used by DSP for controlling the data slice level.
Digital system GND pin.
No connection
[Focus search smoothing capacitor output pin.]
No connection
No connection
Disc defect detection output pin.
Reference clock input pin. 4.23 MHz signal from the DSP is input.
Microprocessor command clock input pin.
Continued on next page.
No.5189 - 4/20
LA9230M/9231M
Continued from preceding page.
Pin
No.
52
53
54
55
56
57
58
59
60
61
62
63
64
Symbol
DAT
CE
DRF
NC
V
CC
2
REF1
VR
LF2
PH1
BH1
LDD
LDS
V
CC
1
Contents
Microprocessor command data input pin.
Microprocessor command chip enable input pin.
RF level detection output (Detect RF).
No connection
Servo system and digital system V
CC
pin.
By-pass capacitor connection pin for reference voltage.
Reference voltage output pin.
Disc defect detection time constant setting pin.
RF signal peak hold capacitor connection pin.
RF signal bottom hold capacitor connection pin.
APC circuit output pin.
APC circuit input pin.
RF system V
CC
pin.
No.5189 - 5/20
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