256Kx16 Bit High Speed Static RAM(5.0V Operating).
Operated at Commercial and Industrial Temperature Ranges.
CMOS SRAM
Revision History
Rev No.
Rev. 0.0
Rev. 0.1
Rev. 0.2
History
Initial release with Preliminary.
Package dimension modify on page 11.
Change Icc, Isb and Isb1
Item
I
CC(Commercial)
10ns
12ns
15ns
10ns
12ns
15ns
Previous
90mA
80mA
70mA
115mA
100mA
85mA
30mA
10mA
Current
65mA
55mA
45mA
85mA
75mA
65mA
20mA
5mA
Draft Data
September. 7. 2001
Septermber.28. 2001
November, 3, 2001
Remark
Preliminary
Preliminary
Preliminary
I
CC(Industrial)
I
SB
I
SB1(Normal)
Rev. 0.3
1. Correct AC parameters : Read & Write Cycle
2. Corrrect Power part : Delete "P-Industrial,Low Power" part
3. Delete Data Retention Characteristics
1. Delete 15ns speed bin.
2. Change Icc for Industrial mode.
Item
10ns
I
CC(Industrial)
12ns
1. Final datasheet release.
2. Delete 12ns speed bin.
1. Add the Lead Free Package type.
November, 23, 2001
Preliminary
Rev. 0.4
December, 18, 2001
Previous
85mA
75mA
Current
75mA
65mA
July, 09, 2002
Preliminary
Rev. 1.0
Final
Rev. 2.0
June. 20, 2003
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to c
hange the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.0
June 2003
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016C1D
4Mb Async. Fast SRAM Ordering Information
Org.
1M x4
Part Number
K6R4004C1D-J(K)C(I) 10
K6R4004V1D-J(K)C(I) 08/10
K6R4008C1D-J(K,T,U)C(I) 10
512K x8
K6R4008V1D-J(K,T,U)C(I) 08/10
K6R4016C1D-J(K,T,U,E)C(I) 10
256K x16
K6R4016V1D-J(K,T,U,E)C(I,L,P) 08/10
VDD(V)
5
3.3
5
3.3
5
3.3
Speed ( ns )
10
8/10
10
8/10
10
8/10
PKG
J : 32-SOJ
K : 32-SOJ(LF)
J : 36-SOJ
K : 36-SOJ(LF)
T : 44-TSOP2
U : 44-TSOP2(LF)
J : 44-SOJ
K : 44-SOJ(LF)
T : 44-TSOP2
U: 44-TSOP2(LF)
E : 48-TBGA
CMOS SRAM
Temp. & Power
C : Commercial Temperature
,Normal Power Range
I : Industrial Temperature
,Normal Power Range
L : Commercial Temperature
,Low Power Range
P : Industrial Temperature
,Low Power Range
-2-
Rev 2.0
June 2003
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016C1D
256K x 16 Bit High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 10ns(Max.)
• Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
Operating K6R4016C1D-10 : 65mA(Max.)
• Single 5.0V±10
%
Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Data Byte Control : LB : I/O1~ I/O8, UB : I/O9~ I/O16
• Standard Pin Configuration
K6R4016C1D-J : 44-SOJ-400
K6R4016C1D-K : 44-SOJ-400(Lead-Free)
K6R4016C1D-T : 44-TSOP2-400BF
K6R4016C1D-U : 44-TSOP2-400BF (Lead-Free)
K6R4016C1D-E : 48-TBGA with 0.75 Ball pitch
(7mm X 9mm)
• Operating in Commercial and Industrial Temperature range.
CMOS SRAM
GENERAL DESCRIPTION
The K6R4016C1D is a 4,194,304-bit high-speed Static Ran-
dom Access Memory organized as 262,144 words by 16 bits.
The K6R4016C1D uses 16 common input and output lines and
has an output enable pin which operates faster than address
access time at read cycle. Also it allows that lower and upper
byte access by data byte control(UB, LB). The device is fabri-
cated using SAMSUNG′s advanced CMOS process and
designed for high-speed circuit technology. It is particularly well
suited for use in high-density high-speed system applications.
The K6R4016C1D is packaged in a 400mil 44-pin plastic SOJ
or TSOP(II) forward or 48 T BGA.
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A
0
A
1
Pre-Charge Circuit
Row Select
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
I/O
1
~I/O
8
I/O
9
~I/O
16
Memory Array
1024 Rows
256 x 16 Columns
Data
Cont.
Data
Cont.
Gen.
CLK
I/O Circuit &
Column Select
A
10
A
11
A
1 2
A
13
A
14
A
15
A
16
A
1 7
WE
OE
UB
LB
CS
-3-
Rev 2.0
June 2003
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016C1D
PIN CONFIGURATION
A
0
A
1
A
2
A
3
A
4
CS
I/O
1
I/O
2
I/O
3
1
2
3
4
5
6
7
8
9
CMOS SRAM
(Top View)
1
2
3
4
5
6
4 4 A
17
4 3 A
16
4 2 A
15
4 1 OE
4 0 UB
3 9 LB
3 8 I/O
16
3 7 I/O
15
3 6 I/O
14
D
Vss
I/O4
A17
A7
I/O12
Vcc
C
I/O2
I/O3
A5
A6
I/O11
I/O10
B
I/O1
UB
A3
A4
CS
I/O9
A
LB
OE
A0
A1
A2
N.C
I/O
4
10
Vcc 11
Vss 12
I/O
5
13
I/O
6
14
I/O
7
15
I/O
8
16
WE 17
A
5
18
A
6
19
A
7
20
A
8
21
A
9
22
SOJ/
TSOP2
3 5 I/O
13
3 4 Vss
3 3 Vcc
3 2 I/O
12
3 1 I/O
11
3 0 I/O
10
2 9 I/O
9
2 8 N.C
2 7 A
14
2 6 A
13
2 5 A
12
2 4 A
11
2 3 A
10
H
N.C
A8
A9
A10
A11
N.C
G
I/O8
N.C
A12
A13
WE
I/O16
F
I/O7
I/O6
A14
A15
I/O14
I/O15
E
Vcc
I/O5
N.C
A16
I/O13
Vss
48-TBGA
PIN FUNCTION
Pin Name
A
0
- A
17
WE
CS
OE
LB
UB
I/O
1
~ I/O
16
V
CC
V
SS
N.C
Pin Function
Address Inputs
Write Enable
Chip Select
Output Enable
Lower-byte Control(I/O
1
~I/O
8
)
Upper-byte Control(I/O
9
~I/O
16
)
Data Inputs/Outputs
Power(+5.0V)
Ground
No Connection
ABSOLUTE MAXIMUM RATINGS*
Parameter
Voltage on Any Pin Relative to V
SS
Voltage on V
CC
Supply Relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
Commercial
Industrial
Symbol
V
IN
, V
OUT
V
CC
P
D
T
STG
T
A
T
A
Rating
-0.5 to V
CC
+0.5
-0.5 to 7.0
1.0
-65 to 150
0 to 70
-40 to 85
Unit
V
V
W
°C
°C
°C
*
Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
-4-
Rev 2.0
June 2003
PRELIMPreliminaryPPPPPPPPPINARY
K6R4016C1D
RECOMMENDED DC OPERATING CONDITIONS*
(T
A
=0 to 70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
4.5
0
2.2
-0.5**
Typ
5.0
0
-
-
Max
5.5
0
V
CC
+0.5***
0.8
Unit
V
V
V
V
CMOS SRAM
* The above parameters are also guaranteed at industrial temperature range.
** V
IL
(Min) = -2.0V a.c(Pulse Width
≤
8ns) for I
≤
20mA
.
*** V
IH
(Max) = V
C C
+ 2.0V a.c (Pulse Width
≤
8ns) for I
≤
20mA.
DC AND OPERATING CHARACTERISTICS*
(T
A
=0 to 70°C, Vcc=5.0V±10%, unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Operating Current
Symbol
I
LI
I
LO
I
CC
V
IN
=V
SS
to V
CC
CS = V
IH
or O E=V
IH
or WE=V
IL
V
OUT
=V
SS
to V
CC
Min. Cycle, 100% Duty
CS = V
IL,
V
IN
=V
I H
or V
IL,
I
OUT
=0mA
Min. Cycle, CS=V
I H
f=0MHz, CS
≥V
CC
-0.2V,
V
IN
≥V
CC
-0.2V or V
IN
≤0.2V
I
OL
=8mA
I
OH
=-4mA
Com.
Ind.
10ns
10ns
Test Conditions
Min
-2
-2
-
-
-
-
-
2.4
Max
2
2
65
75
20
5
0.4
-
V
V
mA
Unit
µA
µA
mA
Standby Current
I
SB
I
SB1
Output Low Voltage Level
Output High Voltage Level
V
OL
V
OH
* The above parameters are also guaranteed at industrial temperature range.
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