Figure 1. Circuit Schematic for 0.9 Volt 1.7 Ampere LDO
RESULTS
Utilizing the circuit in Figure 1, layout in Figure 3 and
values in Table 1, the output voltage varies 40 millivolts
between 1.5 volts to 3.0 volts and 0 amperes to 1.7 amperes
for an output voltage centered at 0.945 volts, which equates
to a +/– 2.5 % variation for load and line. The voltage droop
due to load transient is small as seen in Figure 2. If R1 is
varied to change the output voltage to 1.8 volts, the
minimum drop out voltage is 34 millivolts under light load
conditions and 230 millivolts for 1.7 amperes. The
minimum input voltage to operate of the circuit in Figure 1
is 1.42 volts for 1.7 amperes and 1.37 volts for 0.5 amperes.
As discussed previously, the operating range of this circuit
can vary depending upon R3.
V
out
: 200 mV/div
I
out
: 0.5 A/div
Time Scale: 100 us/div
Figure 2. Load Transient for 1.8 Volts In and Load
from 0.5 Amperes to 1.5 Amperes
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2
AND8028/D
Out
GND
In
C2
+
C1
+
C3 U1
R2
R1
Q1
R6
R3
C4
D1
R4
Q2
R5
Figure 3. Layout of NCP100/MBT35200 LDO (4x)
Table 1. Part Description for LDO Circuit
Reference
C1
C2
C3
C4
D1
JP1
Q1
Q2
R1
R2
R3
R4
R5
R6
U1
Part
100 u
100 u
1u
1n
MRA4003T3
Connector
MBT35200
MBT3904
1.5 k
4.3 k
18
10
300
1k
NCP100
Description
AVX Tantalum SMT
AVX Tantalum SMT
0805 Ceramic Chip Cap
0805 Ceramic Chip Cap
ON Semiconductor SMA Diode
3 Pin Connector
ON Semiconductor TSOP–6 PNP
ON Semiconductor SOT–23 NPN
1206 Chip Resistor
0805 Chip Resistor
0805 Chip Resistor
0805 Chip Resistor
0805 Chip Resistor
0805 Chip Resistor
ON Semiconductor Precision Reference
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3
AND8028/D
ON Semiconductor
and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
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